Etched.Ai TN Visa Sponsorship Jobs USA
Etched.Ai is an AI chip hardware company that hires TN visa professionals in engineering and technical roles. Canadian and Mexican professionals with backgrounds in electrical engineering, computer engineering, or related specialties will find Etched.Ai a legitimate TN-supporting employer in the semiconductor and AI hardware space.
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Get Access To All JobsAbout Etched
Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substrates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible.
Key responsibilities
- IC Substrate Layout Design
- Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.
- Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.
- Ensure robust power delivery designs capable of supporting >700W custom silicon solutions.
- High-Speed Signal Routing & Integrity
- Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk.
- Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout.
- Advanced Packaging & CoWoS Integration
- Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance.
- Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.
- Design Validation & Verification
- Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs.
- Develop and maintain design documentation and guidelines for future substrate designs.
- Support design reviews and provide technical guidance to junior team members.
You may be a good fit if you have
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 10+ years of experience in IC substrate layout design for high-performance processors or accelerators.
- Extensive experience with large substrate packages (>50mm) and complex high-density layouts.
- Proven experience with high-power (700W+) package designs and robust power delivery networks.
- Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches).
- Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWoS.
- Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification).
- Deep understanding of SI/PI principles and how they apply to package-level design.
- Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment.
Benefits
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Housing subsidy of $2k per month for those living within walking distance of the office
- Relocation support for those moving to San Jose (Santana Row)
- Various wellness benefits covering fitness, mental health, and more
- Daily lunch + dinner in our office
How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
About Etched
Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substrates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible.
Key responsibilities
- IC Substrate Layout Design
- Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.
- Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.
- Ensure robust power delivery designs capable of supporting >700W custom silicon solutions.
- High-Speed Signal Routing & Integrity
- Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk.
- Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout.
- Advanced Packaging & CoWoS Integration
- Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance.
- Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.
- Design Validation & Verification
- Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs.
- Develop and maintain design documentation and guidelines for future substrate designs.
- Support design reviews and provide technical guidance to junior team members.
You may be a good fit if you have
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 10+ years of experience in IC substrate layout design for high-performance processors or accelerators.
- Extensive experience with large substrate packages (>50mm) and complex high-density layouts.
- Proven experience with high-power (700W+) package designs and robust power delivery networks.
- Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches).
- Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWoS.
- Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification).
- Deep understanding of SI/PI principles and how they apply to package-level design.
- Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment.
Benefits
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Housing subsidy of $2k per month for those living within walking distance of the office
- Relocation support for those moving to San Jose (Santana Row)
- Various wellness benefits covering fitness, mental health, and more
- Daily lunch + dinner in our office
How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
Job Roles at Etched.Ai
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Get Access To All JobsTips for Finding Etched.Ai TN Visa Sponsorship Jobs USA
Map your degree to USMCA professions
TN eligibility depends on your specific degree field matching a USMCA profession category, not just your job title. For Etched.Ai roles, verify your engineering or computer science credentials align with the exact O*NET occupation profile listed in your offer letter before applying.
Request an offer letter covering USMCA specifics
Etched.Ai's offer letter must state your USMCA profession category, your specific duties in AI chip design or hardware engineering, your Canadian or Mexican citizenship, and your intended period of stay. A vague letter is the most common reason CBP officers deny TN admission at the border.
Benchmark your salary against OFLC Wage Search
Even though TN doesn't require an LCA, border officers can question whether your compensation reflects a genuine specialty role. Pull the OFLC Wage Search data for your SOC code in the San Francisco Bay Area, where Etched.Ai operates, and confirm your offer meets or exceeds Level I prevailing wage.
Target hardware and chip design teams directly
Etched.Ai builds custom AI inference chips, so TN-eligible roles cluster in chip architecture, RTL design, physical design, and validation engineering. Applying directly to these teams signals you understand the company's technical focus and shortens the time to a TN-ready offer letter.
Use Migrate Mate to verify TN role eligibility early
Before you invest time interviewing, confirm your target role at Etched.Ai actually qualifies under USMCA. Migrate Mate lets you check whether the job title and duties map to a recognized TN profession, so you don't reach the offer stage only to discover the role doesn't qualify.
Prepare for a same-day POE decision as a Canadian
Canadian citizens apply for TN admission at a port of entry with no advance petition. Bring your Etched.Ai offer letter, degree transcripts, and proof of Canadian citizenship. CBP makes its decision on the spot, so having organized, complete documentation matters more than anything else you bring.
Etched.Ai TN Visa Sponsorship: Frequently Asked Questions
Does Etched.Ai sponsor TN visas?
Yes. Etched.Ai supports TN admission for qualified Canadian and Mexican professionals. Because TN is treaty-based under USMCA rather than an employer petition, Etched.Ai's role is to issue a compliant offer letter that you present at a U.S. port of entry or consulate. The company does not file a petition or LCA on your behalf.
Which roles at Etched.Ai typically qualify for TN status?
Roles in chip architecture, RTL and physical design, hardware validation, and computer engineering align most closely with recognized USMCA profession categories. Software engineering roles may qualify if the position requires a specific engineering or computer science degree. Etched.Ai's business is AI chip hardware, so most technical openings fall within USMCA-eligible occupation categories.
How do I start the TN process once Etched.Ai extends an offer?
Ask your Etched.Ai recruiter for a TN support letter that identifies your USMCA profession category, describes your hardware or engineering duties, and confirms your citizenship. Canadian citizens then present the letter at a U.S. port of entry. Mexican citizens schedule a nonimmigrant visa appointment at a U.S. consulate before traveling.
How long does TN admission take at Etched.Ai?
For Canadian citizens, CBP adjudicates TN admission at the port of entry the same day you arrive, provided your documentation is complete. Mexican nationals must first obtain a TN visa stamp at a U.S. consulate, which adds consular appointment wait time. Etched.Ai can issue its offer letter quickly once an offer is accepted, so your timeline depends primarily on your citizenship.
How do I find open TN-eligible jobs at Etched.Ai?
Migrate Mate filters job listings by visa type and employer, making it straightforward to identify Etched.Ai openings that align with USMCA profession categories. You can also monitor Etched.Ai's careers page directly and filter for engineering and hardware roles. Cross-reference each role's requirements against USMCA profession definitions through USCIS before applying.
How does TN visa admission work at Etched.Ai?
TN status is granted under the USMCA treaty — there is no USCIS petition or Labor Condition Application required. Canadian citizens can apply directly at a U.S. port of entry with an offer letter from Etched.Ai, while Mexican citizens must first obtain a TN visa at a U.S. consulate. The role must match one of the professions listed in USMCA Appendix 1603.D.1. Migrate Mate filters TN job listings to roles that fall within the eligible profession list.