Intel Ndtm US LLC TN Visa Sponsorship Jobs USA
Intel Ndtm U.S. LLC hires TN visa professionals for technical roles in electronics and hardware, issuing offer letters for Canadian and Mexican nationals in qualifying USMCA professions. Engineering, computer science, and research positions are common entry points. Intel is a well-established TN employer with consistent hiring across its U.S. semiconductor and hardware operations.
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JOB DESCRIPTION:
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
We are looking for a talented and motivated Physical Design Floorplanning Engineer to join our team.
In this role key responsibilities are:
- Top-down SoC Floorplan activities like best IP placement for latency/area in collaboration with architects, partitioning, PG grid creation, multi-power domain planning, pin-cutting, bump-planning by working with package/platform.
- Estimate die-area and define optimal physical dimensions for SoC by including product costs like die-per-reticle, right technology selection/metal stack and reuse from different product family.
- Drive execution and supervise progress of smaller blocks or sub-systems influencing their physical placement, shape, and channel planning to help them achieve best area and convergence schedule.
- Plan short and long-term work schedule, understanding dependencies between different domains like top, block place and route.
Responsibilities:
- Collaborate with other stakeholders like the clock design to deliver the physical block level floorplans for APR and with the power delivery team on tradeoffs for metal allocation for signal and power.
- Experienced in industry standard tools.
- Help drive methodologies, tools and best-known methods to streamline Floorplan Physical Design work to achieve best-in-class on schedule delivery.
QUALIFICATIONS
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
MINIMUM QUALIFICATIONS:
Bachelor in Electrical/Electronics/Computer Engineering with 3+ years of relevant experience or Master's degree in Electrical/Electronics/Computer Engineering with 2+ years of relevant experience.
- 2+ years of experience using industry-standard EDA tools for floorplanning and APR.
- 1+ years of experience with multi-power domain designs.
- 1+ years of experience with Synopsys Fusion Compiler.
- 3+ years of experience with TCL, Python or Perl programming.
- 2+ years of experience with Calibre or ICV verification.
PREFERRED QUALIFICATIONS:
- Good Knowledge with all aspects of ASIC integration including Floorplanning, Clock and Power distribution, Global signal planning, I/O planning and Macro placement.
- Familiar with hierarchical design approach, top-down design, handling MIB (multiple instantiation blocks), routing and physical convergence.
- Deep knowledge of SoC Floorplan requirements like multiple voltage and clock domains, Level Shifters/Isolation, thermal management, Die-to-Die interconnects, and package interactions.
- Understanding of UPF/CPF, low power static verification, and multi-power domain design planning.
- Expertise with Floorplanning tools - ICC2/FC, Place and Route flows, and Physical Design Verification Flows is required.
- Experience with large subsystem designs (20M gates) with frequencies in excess of 2GHz.
- Good automation skills/focus with coding familiarity in tcl/perl/python.
- Excellent communication and teamwork skills.
JOB TYPE:
Experienced Hire
SHIFT:
Shift 1 (United States of America)
PRIMARY LOCATION:
US, Colorado, Fort Collins
ADDITIONAL LOCATIONS:
US, California, Folsom
US, Massachusetts, Beaver Brook
US, Oregon, Hillsboro
US, Texas, Austin
BUSINESS GROUP:
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
POSTING STATEMENT:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
POSITION OF TRUST
N/A
BENEFITS
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
WORK MODEL FOR THIS ROLE
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. The application window for this job posting is expected to end by 05/22/2026.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
JOB DETAILS:
JOB DESCRIPTION:
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
We are looking for a talented and motivated Physical Design Floorplanning Engineer to join our team.
In this role key responsibilities are:
- Top-down SoC Floorplan activities like best IP placement for latency/area in collaboration with architects, partitioning, PG grid creation, multi-power domain planning, pin-cutting, bump-planning by working with package/platform.
- Estimate die-area and define optimal physical dimensions for SoC by including product costs like die-per-reticle, right technology selection/metal stack and reuse from different product family.
- Drive execution and supervise progress of smaller blocks or sub-systems influencing their physical placement, shape, and channel planning to help them achieve best area and convergence schedule.
- Plan short and long-term work schedule, understanding dependencies between different domains like top, block place and route.
Responsibilities:
- Collaborate with other stakeholders like the clock design to deliver the physical block level floorplans for APR and with the power delivery team on tradeoffs for metal allocation for signal and power.
- Experienced in industry standard tools.
- Help drive methodologies, tools and best-known methods to streamline Floorplan Physical Design work to achieve best-in-class on schedule delivery.
QUALIFICATIONS
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
MINIMUM QUALIFICATIONS:
Bachelor in Electrical/Electronics/Computer Engineering with 3+ years of relevant experience or Master's degree in Electrical/Electronics/Computer Engineering with 2+ years of relevant experience.
- 2+ years of experience using industry-standard EDA tools for floorplanning and APR.
- 1+ years of experience with multi-power domain designs.
- 1+ years of experience with Synopsys Fusion Compiler.
- 3+ years of experience with TCL, Python or Perl programming.
- 2+ years of experience with Calibre or ICV verification.
PREFERRED QUALIFICATIONS:
- Good Knowledge with all aspects of ASIC integration including Floorplanning, Clock and Power distribution, Global signal planning, I/O planning and Macro placement.
- Familiar with hierarchical design approach, top-down design, handling MIB (multiple instantiation blocks), routing and physical convergence.
- Deep knowledge of SoC Floorplan requirements like multiple voltage and clock domains, Level Shifters/Isolation, thermal management, Die-to-Die interconnects, and package interactions.
- Understanding of UPF/CPF, low power static verification, and multi-power domain design planning.
- Expertise with Floorplanning tools - ICC2/FC, Place and Route flows, and Physical Design Verification Flows is required.
- Experience with large subsystem designs (20M gates) with frequencies in excess of 2GHz.
- Good automation skills/focus with coding familiarity in tcl/perl/python.
- Excellent communication and teamwork skills.
JOB TYPE:
Experienced Hire
SHIFT:
Shift 1 (United States of America)
PRIMARY LOCATION:
US, Colorado, Fort Collins
ADDITIONAL LOCATIONS:
US, California, Folsom
US, Massachusetts, Beaver Brook
US, Oregon, Hillsboro
US, Texas, Austin
BUSINESS GROUP:
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
POSTING STATEMENT:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
POSITION OF TRUST
N/A
BENEFITS
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
WORK MODEL FOR THIS ROLE
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. The application window for this job posting is expected to end by 05/22/2026.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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Get Access To All JobsTips for Finding Intel Ndtm US LLC TN Visa Sponsorship Jobs USA
Align your credentials to USMCA professions
TN admission at Intel requires your role to fall within the USMCA professions list. Cross-reference your job title against O*NET occupation codes for electronics and hardware engineering to confirm your position qualifies before applying. A mismatch at the border creates delays that a credential audit beforehand prevents.
Target Intel's semiconductor and hardware divisions
Intel's U.S. operations concentrate heavily in chip design, process engineering, and hardware architecture. Focus your job search on those divisions rather than corporate generalist roles. Engineering and computer science titles in those teams align most cleanly with USMCA-eligible professions Intel regularly issues offer letters for.
Request a TN-ready offer letter before your border crossing
Intel's offer letter must specify your USMCA profession category, employer address, job duties, and employment duration. Before your port-of-entry appointment, confirm the letter includes all CBP-required details. Missing one field can result in TN admission being denied even when the underlying role qualifies.
Prepare degree equivalency documents for three-year degrees
CBP officers assess whether your credentials meet the bachelor's-level threshold required for most USMCA professions. If you hold a Canadian three-year bachelor's degree, bring a credential evaluation confirming U.S. equivalency. Intel's technical roles typically require engineering or computer science credentials that CBP scrutinizes closely at entry.
Check Intel's active TN roles using Migrate Mate
Before cold-applying, use Migrate Mate to identify Intel's current TN-supporting job postings filtered by visa type. Targeting roles Intel has actively hired TN professionals for reduces the risk of pursuing positions where the hiring team isn't set up to issue the required USMCA offer letter.
Time your TN renewal before your current status expires
TN status is granted in up to three-year increments with no cap on renewals. Intel can reissue a support letter for renewal, but internal HR processing takes time. Initiate renewal conversations with Intel's immigration team at least 60 days before your I-94 expiration to avoid a gap in authorized status.
Intel Ndtm US LLC TN Visa Sponsorship: Frequently Asked Questions
Does Intel Ndtm U.S. LLC sponsor TN visas?
Yes. Intel Ndtm U.S. LLC supports TN admission for Canadian and Mexican nationals in USMCA-eligible professions. Rather than filing a petition, Intel issues offer letters that workers present at a U.S. port of entry or consulate. Roles in engineering, computer science, and hardware design are the most common TN-supported positions at Intel.
Which roles and departments at Intel Ndtm U.S. LLC typically support TN admission?
Intel's semiconductor engineering, chip architecture, process development, and hardware research teams most frequently issue TN support letters. These roles align with USMCA professions such as engineer and computer systems analyst. Corporate roles outside technical disciplines are less likely to qualify, since the position itself must match a defined USMCA profession category.
How do I navigate the TN process after receiving an offer from Intel Ndtm U.S. LLC?
Once Intel issues your offer letter, Canadian citizens present it directly at a U.S. land border or airport port of entry for CBP review. Mexican nationals must schedule a TN visa appointment at a U.S. consulate first. In both cases, bring your offer letter, degree credentials, and passport. No USCIS petition is involved in this process.
How long does TN admission take when working with Intel Ndtm U.S. LLC?
Canadian citizens can receive TN admission the same day at the port of entry if CBP approves on the spot. Mexican nationals face consular appointment wait times that vary by location and season, typically ranging from a few days to several weeks. Use Migrate Mate to track Intel's active TN-supporting postings while you prepare your documents.
Does Intel Ndtm U.S. LLC also hire on H-1B or other work visas besides TN?
Yes. Intel Ndtm U.S. LLC sponsors multiple visa types including H-1B visa, E-3 visa, F-1 OPT, F-1 CPT, J-1 visa, and supports Green Card pathways through EB-2 and EB-3. TN is one option within a broader sponsorship profile, making Intel a practical target for Canadian and Mexican nationals who qualify for TN and may later pursue permanent residency.
How does TN visa admission work at Intel Ndtm US LLC?
TN status is granted under the USMCA treaty — there is no USCIS petition or Labor Condition Application required. Canadian citizens can apply directly at a U.S. port of entry with an offer letter from Intel Ndtm US LLC, while Mexican citizens must first obtain a TN visa at a U.S. consulate. The role must match one of the professions listed in USMCA Appendix 1603.D.1. Migrate Mate filters TN job listings to roles that fall within the eligible profession list.