Test Engineering Manager Jobs in Santa Clara, CA
Test Engineering Manager jobs in Santa Clara are in strong demand, concentrated in the Central Expressway corridor, the Rivermark and Mission College districts, and the dense tech campuses along Great America Parkway, across semiconductor, networking hardware, and consumer electronics sectors. Employers hiring right now include NVIDIA, Marvell Technology, and SiTime Corporation. See the openings below and apply to the ones that match your experience.
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About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell is expanding its global Test Solutions Engineering (TSE) organization and seeking an experienced Senior Technical Leader to build and lead a new TSE team in the West Coast US region.The TSE organization owns ATE based production test development and plays a critical role in optimizing cost, quality, and NPI execution for Marvell’s custom data center silicon. This role has both organizational leadership responsibilities and deep technical ownership across new product introduction and high volume manufacturing readiness.
You will be responsible for building the regional team, developing talent, driving execution, and partnering globally to support rapid production ramps for hyperscale customers.
What You Can Expect
Technical Leadership & Execution
- Serve as the primary technical expert for ATE‑based test development for new products.
- Lead the development, validation, and release of production test solutions.
- Provide technical direction and mentorship to junior engineers as the regional team grows.
New Product Introduction (NPI)
- Own test architecture and bring‑up activities from design start through production ramp.
- Drive root‑cause analysis, debug, and silicon characterization to ensure robust test coverage.
Customer & Cross‑Functional Collaboration
- Act as a key technical interface to customers to define test strategy and resolve issues.
- Partner closely with design, DFT, product engineering, test engineering, operations, and quality teams.
Test Strategy & Specification Development
- Define test patterns, limits, screening methods, and test time optimization opportunities.
- Ensure test strategies align with product performance, cost, and quality requirements.
Quality, Reliability, and Sustaining Support
- Support reliability qualifications, stress testing, and failure analysis.
- Contribute to continuous improvement of manufacturing test processes and yield performance.
What We're Looking For
Required Qualifications
- Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- 10-15+ of years of experience in Custom Processor /ASIC Product Engineering, Test Engineering, DFT, or Technology Characterization.
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Expertise in one or more of the following areas:
- Product Engineering and Test Development
- Automated Test Equipment (ATE)
- Semiconductor process technology
- Reliability and qualification methodologies
- Proven ability to lead technical execution across complex programs.
- Strong written and verbal communication skills.
Preferred Qualifications
- Master’s or PhD in EE/CS (experience level dependent).
- Experience supporting hyperscale or large enterprise customers.
- Experience influencing cross‑functional technical decisions across global teams.
Expected Base Pay Range (USD)
185,390 - 277,700, $ per annumThe successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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Find Test Engineering Manager JobsTest Engineering Manager Job Market in Santa Clara
Who's Hiring
- NVIDIA18

- Marvell Technology18

- SiTime Corporation18

- AMD9

- Wipro9

Top Industries Hiring
- Electronics & Hardware
- Technology & Software
Test Engineering Manager Jobs in Santa Clara: Frequently Asked Questions
How do I get a test engineering manager job in Santa Clara?
Your strongest path into a test engineering manager role in Santa Clara is through the city's semiconductor and networking hardware companies, which cluster along the Great America Parkway and Central Expressway corridors and hire experienced test leads ahead of product tape-outs and manufacturing ramp cycles. Candidates who can demonstrate hands-on experience with automated test equipment, ATE platform management, or VLSI validation have a clear edge here. Building relationships at local IEEE Santa Clara Valley chapter events and SVC-specific engineering meetups also surfaces unadvertised openings before they go live.
Which companies hire test engineering managers in Santa Clara?
Employers hiring test engineering managers in Santa Clara right now include NVIDIA, Marvell Technology, and SiTime Corporation, based on current listings on Migrate Mate as of September 2026. Santa Clara's hiring base skews heavily toward chip designers, networking equipment manufacturers, and consumer hardware firms with large on-site validation and reliability labs.
Are there remote test engineering manager jobs in Santa Clara?
Yes, though remote availability is limited because test engineering manager work is inherently hands-on, tied to physical labs, ATE systems, and on-site teams. About 67% of test engineering manager openings tied to Santa Clara are remote or hybrid as of September 2026, and those tend to involve program coordination, vendor management, or test strategy roles rather than direct lab oversight.
How can I get a test engineering manager job in Santa Clara with little or no experience?
The most realistic entry path in Santa Clara is moving up from a senior test engineer or test development engineer role at one of the city's semiconductor or networking hardware companies, where internal promotion into people management is common after you demonstrate ownership of a test program or ATE platform. Contract-to-hire engagements at validation labs in the Rivermark and Mission College areas also give candidates management exposure. A strong foundation in Python-based test automation or boundary scan techniques makes the transition faster with local employers.
Which industries hire the most test engineering managers in Santa Clara?
The sectors hiring the most test engineering managers in Santa Clara are Electronics & Hardware and Technology & Software, based on current listings on Migrate Mate as of September 2026. Santa Clara's position as a global center for chip design and networking infrastructure means demand in these sectors is driven by continuous new product development cycles and the need to qualify hardware before volume manufacturing.
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