Analog Layout Design Engineer Jobs
Analog Layout Design Engineer jobs are open from new-grad to principal across semiconductor, fabless IC design, automotive electronics, and consumer electronics companies, with specializations in RF, mixed-signal, and high-speed serial interface layout. See the openings below and apply to the ones that match your experience.
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Category Engineering Hire Type Employee Job ID 19299 Base Salary Range $193200-$289800 Remote Eligible No Date Posted 11/11/2026
We Are
At Synopsys, our Silicon IP business is expanding to serve growing demand for special-purpose silicon. We are moving beyond traditional standards-based IP into application-optimized IP (AOIP), helping customers develop differentiated silicon tailored to specific workloads and system architectures.
As AI drives demand for custom silicon across hyperscalers and system companies, we use our interface IP leadership, system expertise, and engineering scale to deliver optimized IP subsystems and platforms that accelerate time-to-market while improving performance and efficiency.
You Are
You are an analog layout methodology expert who has used AI in real production flows, beyond prototypes. You are discerning about where AI adds value and match the tool to the problem, whether that is AI, a rule-based method, a classic algorithm, or a script.
You are focused on users. You listen to layout designers, understand the problem behind each request, and turn it into clear, testable requirements. You are a systems thinker who can define and specify AI-enabled systems from start to finish, including requirements, data, evaluation of results, failure modes, and deployment.
You build generalizable, scalable, and maintainable software designed for long-term reuse across teams and projects. You are also an excellent communicator who can adjust your message for engineers, partner teams, and leadership, presenting with confidence and precision in design reviews, deployments, and stakeholder meetings.
What You'll Be Doing
- Help shape the strategy and roadmap for analog layout methodology, including where AI and automation fit in, and influence priorities across the team.
- Collect and synthesize feedback from layout users across projects. Identify patterns, separate needs from nice-to-haves, and turn them into specifications with clear scope, acceptance criteria, and priority.
- Identify the highest-impact challenges in the layout flow and determine the most effective solution for each, whether AI-driven, algorithmic, rule-based, or process-based.
- Write specifications for AI-enabled layout systems, including problem definition, data needs, success metrics, validation, guardrails, and hand-off to production.
- Bring requests to key stakeholders, including CAD/EDA, AI and automation teams, circuit design, and leadership. Frame each request around its impact, dependencies, and trade-offs to support clear decisions.
- Run deployments and reviews. Present plans and results, set expectations, train users, collect feedback after release, and close the loop.
- Build and review reusable automation frameworks and set coding standards the team can grow with. Enable layout engineers to
- AI effectively and responsibly in their daily work through hands-on training, live demonstrations, and mentorship.
The Impact You Will Have
- Create solutions that address real designer problems, grounded in requirements that are gathered and validated before development begins.
- Enable faster stakeholder decisions by ensuring asks are clear, prioritized, and well justified.
- Drive smooth rollouts and higher adoption through well-run deployments and reviews.
- Deliver measurable improvements in layout productivity, quality, and turnaround time.
- Build automation that scales across projects instead of becoming a collection of fragile tools.
What You'll Need
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar technical field; MSEE or PhD preferred.
- 10–15 years of experience in IC design.
- Deep expertise in analog and mixed-signal layout, including matching, parasitics, reliability (EM/IR), and physical verification.
- A proven track record of designing, deploying, and maintaining AI/ML or advanced automation in production engineering environments.
- Proven experience gathering user requirements and turning them into technical specifications that teams have delivered.
- Strong software engineering habits, including modular design, testing, version control, and documentation.
- Working knowledge of agentic AI workflows, strong Python programming skills, and proficiency in Tcl or SKILL.
- Experience with version control systems such as Git and Perforce. Familiarity with databases is a plus.
- Excellent written and verbal communication skills. You can influence adjacent teams in ambiguous or sensitive situations and represent the work to executive leadership.
Who You Are
- You understand analog layout deeply and can connect real designer needs with practical methodology and automation solutions.
- You know when AI adds value and when a rule-based method, classic algorithm, script, or other approach is the better solution.
- You listen to users, uncover the underlying problem, and translate their needs into clear and testable requirements.
- You think in systems and consider requirements, data, evaluation criteria, failure modes, validation, and deployment from the beginning.
- You build scalable, maintainable software that can be reused across teams and projects.
- You communicate effectively with engineers, partner teams, and leadership and can present confidently in design reviews, deployments, and stakeholder discussions.
- You use independent judgment to select methods, techniques, and evaluation criteria, and you review and may approve the work of others.
The Team You'll Be Part Of
You will join the Analog/Mixed-Signal IP (AMSIP) Enablement, Methodology and Automation team, which defines the methodologies, flows, and tools that our analog layout engineers rely on to deliver Synopsys IP.
Within this team, you will be part of the sub-team that creates and shapes the AI workflows, skills, and tools for analog layout engineers. You will partner closely with layout designers, CAD/EDA, and automation teams to turn real production needs into solutions that raise layout productivity and quality.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
- Inclusive work culture supporting diverse backgrounds and experiences.
- Reasonable accommodations available throughout the recruitment and employment process
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can
Analog Layout Design Engineer Jobs by Experience Level
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Who's Hiring



Top Industries Hiring
- Electronics & Hardware
- Science & Research
- Telecommunications
What Employers Look For
The qualifications that appear most often in analog layout design engineer jobs.
- Proficiency in Cadence Virtuoso layout editor and associated Cadence analog design environment
- Experience with physical verification tools including Calibre DRC, LVS, and parasitic extraction
- Hands-on work with submicron CMOS process design kits at nodes below 180nm
- Understanding of matching techniques, shielding, and substrate noise isolation for analog circuits
- Bachelor's degree or higher in electrical engineering or a closely related field
- Familiarity with RF or mixed-signal layout constraints such as return current paths and isolation
Tips for Your Analog Layout Design Engineer Job Search
Tailor your resume to EDA tools
List every EDA tool you've used, specifically Cadence Virtuoso, Mentor Calibre, and any PDK experience by node. Hiring managers screen resumes for exact tool names before reading anything else, so generic 'layout tools' phrasing will get you filtered out.
Showcase silicon-proven tape-out work
Employers want to see layouts that actually went to fab. Call out each tape-out in your resume by technology node, die area, and your specific block ownership. Layouts that never reached silicon still count if you describe how far they progressed.
Apply early to roles that fit
Migrate Mate lists analog layout design engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.
Filter openings by technology node
Job titles vary wildly across companies, so search for the process nodes you know, such as TSMC 28nm, GF 22FDX, or XFAB 180nm. Companies that work at those nodes are almost certainly hiring analog layout engineers even if the posting title is generic.
Prepare a DRC-clean layout sample
Bring a printed or PDF layout excerpt to interviews that shows your clean DRC results, guard ring placement, and matching strategy on a differential pair or current mirror. Reviewers notice immediately when a candidate can defend specific layout decisions under questioning.
Negotiate against the full offer package
Analog layout roles at fabless companies often include tape-out bonuses or IP licensing royalties on top of base pay. Ask explicitly about milestone bonuses tied to successful tape-outs before accepting, since these can represent meaningful additional compensation that never appears in the initial offer.
Analog Layout Design Engineer Jobs: Frequently Asked Questions
Which companies are hiring the most analog layout design engineers?
Apple, Celero Communications, and Meta are hiring the most analog layout design engineers right now, with openings concentrated in California, Texas, and Oregon, based on current listings on Migrate Mate as of November 2026. Demand is especially strong at fabless semiconductor companies and automotive IC suppliers.
How many analog layout design engineer jobs are remote?
About 33% of analog layout design engineer openings are fully remote or hybrid as of November 2026, which is lower than many engineering disciplines because hands-on PDK access and secure fab data handling often require on-site work. Roles focused on digital-to-analog interface verification or documentation review are most likely to offer remote flexibility.
How do you become an analog layout design engineer?
Start with a bachelor's degree in electrical engineering covering circuit theory, semiconductor devices, and integrated circuit design. Build hands-on experience with Cadence Virtuoso through university coursework, internships, or personal projects using free PDK environments. Focus on learning DRC and LVS clean techniques, matching strategies for differential pairs, and parasitic-aware routing before applying for entry-level roles.
Can you get hired as an analog layout design engineer with little experience?
Yes, entry-level analog layout roles exist, but you need to demonstrate that you can produce DRC and LVS clean layouts independently. Build a portfolio using open-source PDKs like SkyWater 130nm in an open-source Cadence-compatible environment, document your matching and guard ring decisions, and target companies that have established training programs for new layout engineers rather than startups that need immediate productivity.
What does the analog layout design engineer interview process look like?
Most processes start with a recruiter screen followed by a technical phone interview covering layout fundamentals such as matching, latch-up prevention, and electromigration rules. A take-home layout exercise or on-site whiteboard session where you draw and explain a specific cell layout is common. Final rounds typically involve a panel with IC designers and the layout lead who probe your trade-off decisions and silicon experience in depth.
Where can I find and apply to analog layout design engineer jobs?
You can find and apply to analog layout design engineer jobs on Migrate Mate, which lists current openings from across the United States. Search for roles that match your process node experience and tool background, then apply directly to each listing that fits your skills and location preferences.
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