Analog Layout Design Engineer Jobs

Analog Layout Design Engineer jobs are open from new-grad to principal across semiconductor, fabless IC design, automotive electronics, and consumer electronics companies, with specializations in RF, mixed-signal, and high-speed serial interface layout. See the openings below and apply to the ones that match your experience.

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Overview

Open roles23
Top stateCalifornia
Top employerApple
Top citySanta Clara, CA
Work type67% On-site
Top industryElectronics

Showing 5 of 23+ Analog Layout Design Engineer jobs

Principal Analog Layout Methodology Engineer – AI & Automation - 19299
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Principal Analog Layout Methodology Engineer – AI & Automation - 19299
Synopsys
Sunnyvale, California
AI (Artificial Intelligence)
Data Science
Software Engineering
$193k - $290k/yr
On-Site
Bachelor's degree in electrical engineering
10,000+

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Physical IC Layout Engineer – Analog / PMIC
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Physical IC Layout Engineer – Analog / PMIC
Glint Tech Solutions
Santa Clara, California
Engineering (Non-Software)
Mechanical Engineering
Specialized Engineering

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Principal Analog Layout Design Engineer
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Principal Analog Layout Design Engineer
Celero Communications
Remote
Specialized Engineering
Electrical Engineering
Industrial & Manufacturing Engineering
Engineering (Non-Software)
Manufacturing Engineering
$200k - $300k/yr
Remote (US)
None

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ASIC Analog Layout Engineer
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ASIC Analog Layout Engineer
Micron Technology
Minneapolis, Minnesota
Specialized Engineering
Electrical Engineering
Engineering (Non-Software)
$54 - $92/hr
On-Site
Bachelor's
10,000+

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Analog Layout Automation Engineer
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Analog Layout Automation Engineer
Apple
Waltham, Massachusetts
Corporate Training & Learning Development
Learning & Development
Program Management
$158k - $281k/yr
Bachelor of Science
10,000+

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Analog Layout Design Engineer Jobs by Experience Level

See All 23 Analog Layout Design Engineer Jobs

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Analog Layout Design Engineer Job Market

Who's Hiring

Apple5 open roles
Celero Communications3 open roles
Meta2 open roles

Top Industries Hiring

  • Electronics & Hardware
  • Science & Research
  • Telecommunications

What Employers Look For

The qualifications that appear most often in analog layout design engineer jobs.

  • Proficiency in Cadence Virtuoso layout editor and associated Cadence analog design environment
  • Experience with physical verification tools including Calibre DRC, LVS, and parasitic extraction
  • Hands-on work with submicron CMOS process design kits at nodes below 180nm
  • Understanding of matching techniques, shielding, and substrate noise isolation for analog circuits
  • Bachelor's degree or higher in electrical engineering or a closely related field
  • Familiarity with RF or mixed-signal layout constraints such as return current paths and isolation

Tips for Your Analog Layout Design Engineer Job Search

Tailor your resume to EDA tools

List every EDA tool you've used, specifically Cadence Virtuoso, Mentor Calibre, and any PDK experience by node. Hiring managers screen resumes for exact tool names before reading anything else, so generic 'layout tools' phrasing will get you filtered out.

Showcase silicon-proven tape-out work

Employers want to see layouts that actually went to fab. Call out each tape-out in your resume by technology node, die area, and your specific block ownership. Layouts that never reached silicon still count if you describe how far they progressed.

Apply early to roles that fit

Migrate Mate lists analog layout design engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.

Filter openings by technology node

Job titles vary wildly across companies, so search for the process nodes you know, such as TSMC 28nm, GF 22FDX, or XFAB 180nm. Companies that work at those nodes are almost certainly hiring analog layout engineers even if the posting title is generic.

Prepare a DRC-clean layout sample

Bring a printed or PDF layout excerpt to interviews that shows your clean DRC results, guard ring placement, and matching strategy on a differential pair or current mirror. Reviewers notice immediately when a candidate can defend specific layout decisions under questioning.

Negotiate against the full offer package

Analog layout roles at fabless companies often include tape-out bonuses or IP licensing royalties on top of base pay. Ask explicitly about milestone bonuses tied to successful tape-outs before accepting, since these can represent meaningful additional compensation that never appears in the initial offer.

Analog Layout Design Engineer Jobs: Frequently Asked Questions

Which companies are hiring the most analog layout design engineers?

Apple, Celero Communications, and Meta are hiring the most analog layout design engineers right now, with openings concentrated in California, Texas, and Oregon, based on current listings on Migrate Mate as of November 2026. Demand is especially strong at fabless semiconductor companies and automotive IC suppliers.

How many analog layout design engineer jobs are remote?

About 33% of analog layout design engineer openings are fully remote or hybrid as of November 2026, which is lower than many engineering disciplines because hands-on PDK access and secure fab data handling often require on-site work. Roles focused on digital-to-analog interface verification or documentation review are most likely to offer remote flexibility.

How do you become an analog layout design engineer?

Start with a bachelor's degree in electrical engineering covering circuit theory, semiconductor devices, and integrated circuit design. Build hands-on experience with Cadence Virtuoso through university coursework, internships, or personal projects using free PDK environments. Focus on learning DRC and LVS clean techniques, matching strategies for differential pairs, and parasitic-aware routing before applying for entry-level roles.

Can you get hired as an analog layout design engineer with little experience?

Yes, entry-level analog layout roles exist, but you need to demonstrate that you can produce DRC and LVS clean layouts independently. Build a portfolio using open-source PDKs like SkyWater 130nm in an open-source Cadence-compatible environment, document your matching and guard ring decisions, and target companies that have established training programs for new layout engineers rather than startups that need immediate productivity.

What does the analog layout design engineer interview process look like?

Most processes start with a recruiter screen followed by a technical phone interview covering layout fundamentals such as matching, latch-up prevention, and electromigration rules. A take-home layout exercise or on-site whiteboard session where you draw and explain a specific cell layout is common. Final rounds typically involve a panel with IC designers and the layout lead who probe your trade-off decisions and silicon experience in depth.

Where can I find and apply to analog layout design engineer jobs?

You can find and apply to analog layout design engineer jobs on Migrate Mate, which lists current openings from across the United States. Search for roles that match your process node experience and tool background, then apply directly to each listing that fits your skills and location preferences.

See All 23 Analog Layout Design Engineer Jobs

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