Chip Design Engineer Jobs
Chip Design Engineer jobs are open across semiconductor, consumer electronics, defense, and automotive industries, covering specializations in RTL design, physical design, and verification, from new-grad to principal and staff engineer levels. See the openings below and apply to the ones that match your experience.
Find Chip Design Engineer JobsOverview
Showing 5 of 17+ Chip Design Engineer jobs
Minimum qualifications:
- Bachelor’s degree or equivalent practical experience.
- 5 years of experience with software development in one or more programming languages.
- 3 years of experience building and shipping technical products. Experience with the domain area of Generative AI and Large Language Models (LLM).
- 3 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture.
Preferred qualifications:
- Master's degree or PhD in Computer Science or related technical field.
- 1 year of experience in a technical leadership role.
- Experience developing accessible technologies.
About the job
In this role, you will develop and apply state-of-the-art AI methods—including multi-turn agentic flows, reinforcement learning (RLVR, RLAIF, RLHF), and evolutionary search to chip design, collaborating closely with research and production silicon teams across Google.As a part of the team, composed of research scientists, research engineers, and software engineers, has already delivered significant impact on real products and flagship Google silicon through foundational research breakthroughs. You will work in lockstep with hardware architects, RTL/DV engineers, and ML model developers to integrate cutting-edge research directly into production chips.
As a part of the AI-assisted chip design team, you will leverage Gemini to optimize the EDA life-cycle and significantly accelerate silicon development. You will solve complex challenges across all design stages, improve Gemini for silicon applications to streamline hardware design and verification, enhance efficiency, and reduce time-to-market.Artificial intelligence will be one of humanity’s most transformative inventions. At Google DeepMind, we are a pioneering AI lab with exceptional interdisciplinary teams focused on advancing AI development to solve complex global challenges and accelerate high-quality product innovation for billions of users. We use our technologies for widespread public benefit and scientific discovery, ensuring safety and ethics are always our highest priority.
We are pushing the boundaries across multiple domains. Our global teams offer varied learning opportunities and career pathways for those driven to achieve exceptional results through collective effort.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $174000 - $252000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Architect, build, and scale multi-turn agentic flows with Gemini and evolutionary workflows (e.g., AlphaEvolve) for improving chip design.
- Develop and curate LLM benchmarks for chip design to evaluate and advance frontier model capabilities.
- Leverage scalable evaluation and Reinforcement Learning (RL) post-training workflows to improve Gemini models for chip design.
- Build on the momentum of landmark AI-for-silicon breakthroughs, where our AI-driven RTL and logic optimization methods have delivered substantial power, performance, and area (PPA) improvements on flagship production chips, and help shape the future of the chip design industry.
- Use AI to solve some of the most complex tasks in automating chip design, such as spec-to-RTL generation, RTL optimization, RTL debugging, and automated Design Verification (DV).
Minimum qualifications:
- Bachelor’s degree or equivalent practical experience.
- 5 years of experience with software development in one or more programming languages.
- 3 years of experience building and shipping technical products. Experience with the domain area of Generative AI and Large Language Models (LLM).
- 3 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture.
Preferred qualifications:
- Master's degree or PhD in Computer Science or related technical field.
- 1 year of experience in a technical leadership role.
- Experience developing accessible technologies.
About the job
In this role, you will develop and apply state-of-the-art AI methods—including multi-turn agentic flows, reinforcement learning (RLVR, RLAIF, RLHF), and evolutionary search to chip design, collaborating closely with research and production silicon teams across Google.As a part of the team, composed of research scientists, research engineers, and software engineers, has already delivered significant impact on real products and flagship Google silicon through foundational research breakthroughs. You will work in lockstep with hardware architects, RTL/DV engineers, and ML model developers to integrate cutting-edge research directly into production chips.
As a part of the AI-assisted chip design team, you will leverage Gemini to optimize the EDA life-cycle and significantly accelerate silicon development. You will solve complex challenges across all design stages, improve Gemini for silicon applications to streamline hardware design and verification, enhance efficiency, and reduce time-to-market.Artificial intelligence will be one of humanity’s most transformative inventions. At Google DeepMind, we are a pioneering AI lab with exceptional interdisciplinary teams focused on advancing AI development to solve complex global challenges and accelerate high-quality product innovation for billions of users. We use our technologies for widespread public benefit and scientific discovery, ensuring safety and ethics are always our highest priority.
We are pushing the boundaries across multiple domains. Our global teams offer varied learning opportunities and career pathways for those driven to achieve exceptional results through collective effort.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $174000 - $252000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Architect, build, and scale multi-turn agentic flows with Gemini and evolutionary workflows (e.g., AlphaEvolve) for improving chip design.
- Develop and curate LLM benchmarks for chip design to evaluate and advance frontier model capabilities.
- Leverage scalable evaluation and Reinforcement Learning (RL) post-training workflows to improve Gemini models for chip design.
- Build on the momentum of landmark AI-for-silicon breakthroughs, where our AI-driven RTL and logic optimization methods have delivered substantial power, performance, and area (PPA) improvements on flagship production chips, and help shape the future of the chip design industry.
- Use AI to solve some of the most complex tasks in automating chip design, such as spec-to-RTL generation, RTL optimization, RTL debugging, and automated Design Verification (DV).
See All 17 Chip Design Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
Find Chip Design Engineer JobsChip Design Engineer Job Market
Who's Hiring
Top Industries Hiring
- Retail
- Aerospace & Defense
- Electronics & Hardware
What Employers Look For
The qualifications that appear most often in chip design engineer jobs.
- Bachelor's or master's degree in electrical engineering or computer engineering
- Proficiency in RTL design using Verilog or SystemVerilog
- Experience with industry EDA tools such as Cadence Virtuoso or Synopsys Design Compiler
- Familiarity with CMOS logic design and digital circuit implementation
- Experience with physical design flows including place-and-route and timing closure
- Knowledge of functional verification methodologies including UVM or formal verification
Tips for Your Chip Design Engineer Job Search
Tailor your resume to the node
Chip design roles are often tied to a specific process node, so calling out your experience at 7nm, 5nm, or 28nm directly in your resume header or summary tells hiring managers instantly whether your background fits their current tapeout.
List your EDA tool stack explicitly
Hiring teams filter resumes by tool, not just skill area. Name your Cadence, Synopsys, and Mentor tools with version familiarity where you have it. Vague mentions of 'industry-standard EDA tools' get filtered out before a human reads the file.
Apply early to roles that fit
Migrate Mate lists chip design engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.
Show tapeout outcomes on your portfolio
If you have tapeout experience, name the chip, your contribution, and whether it went to production. Hiring managers at fabless companies weigh hands-on tapeout experience heavily, and a one-line portfolio entry beats a paragraph of general design background.
Prep for block-level design exercises
Most chip design interviews include a whiteboard or take-home exercise around a small design problem: floorplanning a block, writing RTL for a module, or finding a timing violation. Practice narrating your reasoning out loud, not just writing correct code.
Negotiate around tape-in and tapeout schedules
Start date and project assignment timing matter as much as base pay in this field. Ask where the team is in the design cycle before negotiating start date, since joining mid-tapeout can affect your first-year experience and your performance review cycle.
Chip Design Engineer Jobs: Frequently Asked Questions
Which companies are hiring the most chip design engineers?
The most active employers for chip design engineers right now are Axon, OpenAI, and WD, and the most openings are in California, New York, and Washington, based on current listings on Migrate Mate as of November 2026. Demand is especially high at fabless semiconductor companies and vertically integrated tech firms building custom silicon.
How many chip design engineer jobs are remote?
About 100% of chip design engineer openings are fully remote or hybrid as of November 2026, which is lower than many engineering disciplines because tapeout workflows, lab access, and EDA tool licensing often require on-site presence. Verification and front-end RTL roles are the most likely to offer remote or hybrid arrangements compared to physical design and mixed-signal positions.
How do you become a chip design engineer?
Most chip design engineers start with a bachelor's degree in electrical or computer engineering, with coursework in digital logic, computer architecture, and VLSI design. Building hands-on experience through lab courses, senior capstone projects, or personal RTL projects strengthens your application. Many roles, especially at advanced nodes, favor candidates with a master's degree or relevant internship experience at a semiconductor company or EDA vendor.
How do you get hired as a chip design engineer with little experience?
Focus on roles labeled associate, junior, or new-grad, which are common at larger semiconductor companies and IDMs running structured hiring programs. A strong academic project demonstrating a full RTL-to-simulation flow, even a small processor core or custom peripheral, can substitute for industry tapeout experience. Applying to companies with established university hiring programs gives entry-level candidates a realistic path into their first full-time role.
What does the chip design engineer interview process look like?
Most chip design interviews include a recruiter phone screen, a technical phone interview covering digital design fundamentals, and one or more rounds with engineers that include RTL coding exercises, timing analysis problems, or design review discussions. Physical design roles often add exercises around floorplanning or timing closure. Senior roles typically include a system-level design discussion with a hiring manager or principal engineer.
Where can I find and apply to chip design engineer jobs?
You can find and apply to chip design engineer jobs on Migrate Mate, which lists current openings from across the United States. Search the listings to find roles that match your experience level and specialization, then apply directly to each one that fits.
See All 17 Chip Design Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
Find Chip Design Engineer Jobs