Green Card SoC Design Engineer Jobs
SoC Design Engineer jobs with green card sponsorship are filed under EB-2 or EB-3, depending on your degree and experience. Most employers use PERM labor certification to test the domestic labor market before sponsoring you permanently. Per-country backlogs mean your priority date matters as much as your offer letter.
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SoC Design Verification Engineer
The Role
UST is searching for two experienced SoC Design Verification Engineers to own functional and performance verification for complex System-on-Chip designs. You will build and maintain UVM-based verification environments, and develop test benches, test cases, and coverage models that take a design from core-level verification through full SoC integration. You will work closely with design and architecture teams to clarify specifications, surface verification risks early, and protect the quality and reliability of our products. Success in this role means closing coverage against the verification plan and catching design defects before silicon is committed.
What You’ll Do
-
Develop and execute verification plans for complex SoC designs, covering functional and performance verification at the core and SoC levels.
-
Perform functional and performance verification using simulation, emulation, and formal verification techniques.
-
Create and maintain UVM-based verification environments, test benches, test cases, and coverage models in SystemVerilog and C++.
-
Run regressions in Synopsys VCS or Cadence Xcelium, and debug and analyze simulation results to isolate and resolve design issues.
-
Review design specifications and architecture with design teams to identify verification challenges early in the development cycle.
-
Develop Python and C/C++ scripts to automate verification flows and results analysis.
-
Document verification results, track coverage and progress, and participate in code reviews to improve verification methodologies.
This position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.
What You Need
Required
-
3–5 years of SoC verification experience, including SoC-level functional and performance verification
-
Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field
-
Strong understanding of digital design principles and SoC architecture
-
Proficiency in SystemVerilog and UVM for building verification environments
-
Proficiency in Python and C/C++ for scripting and test development
-
Hands-on experience with simulation tools such as Synopsys VCS or Cadence Xcelium, including debugging simulation results
Preferred
-
Proficiency in Verilog or VHDL
-
Experience with formal verification techniques
-
Experience with emulation platforms
-
Experience with OVM or VMM verification methodologies
-
Working knowledge of industry-standard protocols such as AXI, AHB, PCIe, and DDR
Location & Compensation
Compensation can differ depending on factors including but not limited to the specific office location, role, skill set, education, and level of experience. UST provides a reasonable range of compensation for roles that may be hired in various U.S. markets as set forth below.
Role Location: Mountain View, CA
Compensation Range: $101,000 - $152,000
Who We Are
Since 1999, UST has worked side by side with the world’s best companies to make a powerful impact through transformation. Headquartered in the United States, UST is powered by technology, driven by AI, inspired by people, and led by our purpose, we partner with our clients from design to operation. Our AI-driven digital solutions, proprietary platforms, engineering, R&D, products, and innovation ecosystem turn core challenges into impactful, disruptive business outcomes. With deep industry knowledge and a future-ready mindset, we infuse expertise, innovation, and agility into our clients’ organizations—delivering measurable value and positive lasting change for them, their customers, and communities around the world. Together, with 30,000+ employees in 30+ countries, we build for boundless impact—touching billions of lives in the process.
Benefits
Full-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty. They are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits. Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines. Benefits offerings vary in Puerto Rico.
Part-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching.
Full-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) program with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance.
Part-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).
All US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.
As part of our recruitment process, UST may use AI or automated tools to support activities such as application screening, scheduling, or interview assistance. All hiring decisions are made by our recruitment team. Where applicable law requires it, further notice will be provided separately.
Equal Employment Opportunity Statement
UST is an Equal Opportunity Employer.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, status as a protected veteran, or any other applicable characteristics protected by law. We will consider qualified applicants with arrest or conviction records in accordance with state and local laws and “fair chance” ordinances.
UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.
Skills
C, C++, SystemVerilog, UVM, SoC Architecture, Emulation, AHB, AXI, Cadence Xcelium, Coverage Modeling, DDR
Benefits
Compensation range: $101,000.00 to $152,000.00 per year
About UST
UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.
Role description
SoC Design Verification Engineer
The Role
UST is searching for two experienced SoC Design Verification Engineers to own functional and performance verification for complex System-on-Chip designs. You will build and maintain UVM-based verification environments, and develop test benches, test cases, and coverage models that take a design from core-level verification through full SoC integration. You will work closely with design and architecture teams to clarify specifications, surface verification risks early, and protect the quality and reliability of our products. Success in this role means closing coverage against the verification plan and catching design defects before silicon is committed.
What You’ll Do
-
Develop and execute verification plans for complex SoC designs, covering functional and performance verification at the core and SoC levels.
-
Perform functional and performance verification using simulation, emulation, and formal verification techniques.
-
Create and maintain UVM-based verification environments, test benches, test cases, and coverage models in SystemVerilog and C++.
-
Run regressions in Synopsys VCS or Cadence Xcelium, and debug and analyze simulation results to isolate and resolve design issues.
-
Review design specifications and architecture with design teams to identify verification challenges early in the development cycle.
-
Develop Python and C/C++ scripts to automate verification flows and results analysis.
-
Document verification results, track coverage and progress, and participate in code reviews to improve verification methodologies.
This position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.
What You Need
Required
-
3–5 years of SoC verification experience, including SoC-level functional and performance verification
-
Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field
-
Strong understanding of digital design principles and SoC architecture
-
Proficiency in SystemVerilog and UVM for building verification environments
-
Proficiency in Python and C/C++ for scripting and test development
-
Hands-on experience with simulation tools such as Synopsys VCS or Cadence Xcelium, including debugging simulation results
Preferred
-
Proficiency in Verilog or VHDL
-
Experience with formal verification techniques
-
Experience with emulation platforms
-
Experience with OVM or VMM verification methodologies
-
Working knowledge of industry-standard protocols such as AXI, AHB, PCIe, and DDR
Location & Compensation
Compensation can differ depending on factors including but not limited to the specific office location, role, skill set, education, and level of experience. UST provides a reasonable range of compensation for roles that may be hired in various U.S. markets as set forth below.
Role Location: Mountain View, CA
Compensation Range: $101,000 - $152,000
Who We Are
Since 1999, UST has worked side by side with the world’s best companies to make a powerful impact through transformation. Headquartered in the United States, UST is powered by technology, driven by AI, inspired by people, and led by our purpose, we partner with our clients from design to operation. Our AI-driven digital solutions, proprietary platforms, engineering, R&D, products, and innovation ecosystem turn core challenges into impactful, disruptive business outcomes. With deep industry knowledge and a future-ready mindset, we infuse expertise, innovation, and agility into our clients’ organizations—delivering measurable value and positive lasting change for them, their customers, and communities around the world. Together, with 30,000+ employees in 30+ countries, we build for boundless impact—touching billions of lives in the process.
Benefits
Full-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty. They are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits. Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines. Benefits offerings vary in Puerto Rico.
Part-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching.
Full-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) program with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance.
Part-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).
All US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.
As part of our recruitment process, UST may use AI or automated tools to support activities such as application screening, scheduling, or interview assistance. All hiring decisions are made by our recruitment team. Where applicable law requires it, further notice will be provided separately.
Equal Employment Opportunity Statement
UST is an Equal Opportunity Employer.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, status as a protected veteran, or any other applicable characteristics protected by law. We will consider qualified applicants with arrest or conviction records in accordance with state and local laws and “fair chance” ordinances.
UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.
Skills
C, C++, SystemVerilog, UVM, SoC Architecture, Emulation, AHB, AXI, Cadence Xcelium, Coverage Modeling, DDR
Benefits
Compensation range: $101,000.00 to $152,000.00 per year
About UST
UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.
See all 40+ Green Card SoC Design Engineer Jobs
Sign up for free to unlock all listings, filter by visa type, and get alerts for new Green Card SoC Design Engineer Jobs.
Get Access To All JobsTips for Finding Green Card Sponsorship as a SoC Design Engineer
Align your degree to EB-2 requirements
EB-2 requires an advanced degree or a bachelor's plus five years of progressive experience in a directly related field. Document each role's RTL-to-tape-out scope in writing now, PERM audits demand contemporaneous evidence, not reconstructed job descriptions.
Search verified PERM-sponsoring employers on Migrate Mate
Target employers with a documented PERM filing history for SoC or semiconductor roles. Migrate Mate shows green-card-sponsoring employers by occupation, so you can identify companies that have already cleared the DOL recruitment process for roles like yours.
Check your SOC code before the prevailing wage determination
SoC Design Engineers typically map to SOC 17-2061 (Computer Hardware Engineers). Confirm the correct code with your employer before DOL issues the prevailing wage determination, a misclassified SOC can delay PERM certification or trigger a denial.
Use O*NET to frame your job duties accurately
O*NET lists the core tasks and specialized skills for your occupation. Matching your actual job description to O*NET language helps your employer write PERM duties that survive recruitment advertising requirements and audit scrutiny without overfitting to a single candidate.
Ask about priority dates before accepting an offer
If you're a national of India or China, your place in the EB-2 or EB-3 queue depends on your priority date, not your offer letter. Ask the employer when they intend to file the PERM and what their average I-140-to-I-485 timeline has been for similar roles.
Understand AC21 portability before the I-485 stage
Once your I-485 has been pending 180 days or more, AC21 lets you transfer to a new employer in the same or similar occupation without restarting the process. Negotiate your start date and role title carefully, a significant duties change could jeopardize portability.
Green Card SoC Design Engineer: Frequently Asked Questions
How does green card sponsorship for a SoC Design Engineer differ from H-1B sponsorship?
H-1B visa is a temporary work status with a fixed term and an annual lottery. Green card sponsorship under EB-2 or EB-3 leads to lawful permanent residence with no renewal requirement. The PERM process requires your employer to test the domestic labor market by posting the role publicly and documenting that no qualified U.S. workers applied, a step that has no equivalent in H-1B filings.
What PERM steps does an employer complete to sponsor a SoC Design Engineer?
The employer starts with a prevailing wage determination from DOL, then runs a mandatory recruitment test, including job postings, newspaper ads, and internal notices, over a defined window. If no qualified U.S. applicants are found, the employer files the PERM application with DOL. After certification, they file an I-140 with USCIS to establish your priority date before you can file the I-485 adjustment of status.
How do I find employers who actively sponsor green cards for SoC Design Engineer roles?
Migrate Mate lists employers with verified PERM filing history filtered by occupation, so you can identify semiconductor and chip design companies that have already completed DOL-certified sponsorships for similar roles. This saves time compared to applying broadly and asking about sponsorship mid-process, when withdrawing is costly for both sides.
Does my Australian or Indian three-year bachelor's degree qualify for EB-2 sponsorship?
EB-2 requires the equivalent of a U.S. advanced degree. A three-year bachelor's degree from Australia or India does not automatically equal a U.S. master's degree. USCIS evaluates foreign credentials through academic equivalency; many applicants in this situation qualify under the alternative EB-2 pathway by combining a bachelor's degree with five years of progressive, specialized SoC design experience.
Can I switch employers while my green card application is pending?
Yes, under AC21 portability rules, once your I-485 has been pending 180 days or more you can move to a new employer in the same or similar occupation without restarting the process. Your priority date can also carry over to a new employer's I-140 once your original I-140 was approved, but the new employer must be willing to file a fresh I-140 on your behalf.