J-1 Visa Hardware Engineer Jobs
Hardware Engineer roles in the United States are accessible to exchange visitors through the J-1 visa Trainee or Research Scholar program categories, depending on your experience level. Securing J-1 sponsorship means partnering with a State Department-designated sponsor organization that issues your DS-2019 and oversees your training plan.
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Get Access To All JobsWe are deploying machine learning directly onto custom hardware – and we want you to help drive it forward. This PhD internship is an opportunity to work on research that has direct impact on IMC's work tackling open problems at the frontier of low-latency ML inference and hardware acceleration.
You'll work alongside IMC engineers in one of the most demanding low-latency computing environments in the world. You'll own a focused research project from start to finish, present your findings to the team, and leave behind a prototype or benchmark that we can build on.
Your Core Responsibilities
- Architect and develop an ML focused research project based on a real-world trading environment
- Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions
- Track and evaluate emerging research in neural architecture search, machine learning systems and quantization methods, and determine what translates to measurable improvements in our systems
- Present your project to the team, deepening our collective understanding of an area of ML acceleration
- Gain hardware design fundamentals from skilled RTL developers and learn how they apply to our industry
- Build skills to evaluate research not only from an academic perspective, but through real-world performance constraints, engineering costs, and industry impact
Your Skills and Experience
- Currently enrolled in a PhD program in Electrical Engineering, Computer Science, Physics, or a related field
- Solid understanding of hardware constraints and design trade-offs (e.g., pipelining, resource utilization, fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs
- Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
- Understanding of machine learning fundamentals – neural network architectures, inference optimization, quantization techniques, ML frameworks such as PyTorch/TensorFlow
- Proficiency in Python or similar languages for tooling, testing, and simulation
- Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams
You may submit one application per role each year. We strongly encourage you to focus on applying to a single role that best matches your skills and interests. Though you may apply to multiple roles, please note that each application will be evaluated based on the specific criteria established for that particular role. If you have already applied for this position during the current recruitment season and were not selected, you may reapply when the next recruitment season begins in 2027.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
Base Salary: $225,000
About us
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we’ve been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture, and our commitment to giving back. From entering dynamic new markets to embracing disruptive technologies, and from developing an innovative research environment to diversifying our trading strategies, we dare to continuously innovate and collaborate to succeed.
We are deploying machine learning directly onto custom hardware – and we want you to help drive it forward. This PhD internship is an opportunity to work on research that has direct impact on IMC's work tackling open problems at the frontier of low-latency ML inference and hardware acceleration.
You'll work alongside IMC engineers in one of the most demanding low-latency computing environments in the world. You'll own a focused research project from start to finish, present your findings to the team, and leave behind a prototype or benchmark that we can build on.
Your Core Responsibilities
- Architect and develop an ML focused research project based on a real-world trading environment
- Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions
- Track and evaluate emerging research in neural architecture search, machine learning systems and quantization methods, and determine what translates to measurable improvements in our systems
- Present your project to the team, deepening our collective understanding of an area of ML acceleration
- Gain hardware design fundamentals from skilled RTL developers and learn how they apply to our industry
- Build skills to evaluate research not only from an academic perspective, but through real-world performance constraints, engineering costs, and industry impact
Your Skills and Experience
- Currently enrolled in a PhD program in Electrical Engineering, Computer Science, Physics, or a related field
- Solid understanding of hardware constraints and design trade-offs (e.g., pipelining, resource utilization, fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs
- Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
- Understanding of machine learning fundamentals – neural network architectures, inference optimization, quantization techniques, ML frameworks such as PyTorch/TensorFlow
- Proficiency in Python or similar languages for tooling, testing, and simulation
- Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams
You may submit one application per role each year. We strongly encourage you to focus on applying to a single role that best matches your skills and interests. Though you may apply to multiple roles, please note that each application will be evaluated based on the specific criteria established for that particular role. If you have already applied for this position during the current recruitment season and were not selected, you may reapply when the next recruitment season begins in 2027.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
Base Salary: $225,000
About us
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we’ve been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture, and our commitment to giving back. From entering dynamic new markets to embracing disruptive technologies, and from developing an innovative research environment to diversifying our trading strategies, we dare to continuously innovate and collaborate to succeed.
See all J-1 Visa Hardware Engineer Jobs
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Get Access To All JobsTips for Finding J-1 Visa Sponsorship as a Hardware Engineer
Align your degree to specialty occupation standards
Hardware engineering roles typically require a bachelor's degree in electrical engineering, computer engineering, or a closely related field. Document your coursework and any specializations in VLSI, embedded systems, or PCB design before approaching host employers.
Build a training plan before your interview
J-1 Trainee sponsorship requires a detailed training plan outlining specific skills you'll develop in the U.S. Draft this plan around concrete hardware engineering competencies like circuit design, FPGA programming, or signal integrity testing to satisfy your designated sponsor's requirements.
Target host employers with existing J-1 host agreements
Semiconductor firms, defense contractors, and research-heavy hardware companies are most likely to have existing host organization agreements with State Department-designated sponsors. Search for roles on Migrate Mate, which surfaces employers aligned with J-1 sponsorship structures.
Verify prevailing wage compliance before accepting an offer
Your host employer must pay the prevailing wage for your hardware engineering role and location. Use the OFLC Wage Search to confirm the applicable wage level before signing any offer letter, so your designated sponsor can validate your compensation during DS-2019 issuance.
Confirm whether the 2-year home residency requirement applies
If your J-1 exchange is government-funded or you're coming from a country on the Exchange Visitor Skills List, you may face a 2-year home residency requirement before changing to an H-1B visa or other work visa. Clarify this with your designated sponsor before accepting the role.
Ask specifically about hardware project scope during offer negotiation
J-1 Trainee and Research Scholar programs require your actual U.S. work to match your stated training objectives. Confirm with the host employer that your day-to-day hardware engineering work, breadboarding, firmware integration, lab testing, directly aligns with the competencies listed in your DS-2019 training plan.
Hardware Engineer J-1 Visa: Frequently Asked Questions
Which J-1 program category fits a Hardware Engineer role?
It depends on where you are in your career. Current students or recent graduates pursuing hands-on hardware work typically qualify under the J-1 Intern category. Professionals with at least one year of relevant hardware engineering experience outside the U.S. generally qualify under the J-1 Trainee category. Researchers working on hardware-adjacent academic projects at a university or institute may qualify under Research Scholar.
Who actually sponsors my J-1 visa as a Hardware Engineer?
Your J-1 visa sponsor is a U.S. Department of State-designated sponsor organization, not your employer. Organizations like AIPT, Cultural Vistas, and IIE issue the DS-2019 form that authorizes your exchange visit. Your employer is the host organization. They provide the hardware engineering role and sign off on your training plan, but they are not the visa sponsor.
How do I find U.S. employers that support J-1 hardware engineering placements?
The most efficient approach is to search roles on Migrate Mate, which lets you filter for positions aligned with J-1 sponsorship structures. Semiconductor companies, defense contractors, and university-affiliated research labs are the most common host employers for hardware engineering exchange visitors. Target roles where the job description references a training component or mentorship structure, since those are the clearest signals of J-1 compatibility.
Can a Hardware Engineer on J-1 Trainee status change employers mid-program?
No. Your J-1 Trainee program is tied to a specific host employer and a specific training plan approved by your designated sponsor. If your host employer changes, you would need to end your current program, work with a designated sponsor to issue a new DS-2019 for the new host, and restart your training plan. The new program must still fall within the Trainee category's maximum 18-month duration.
Does my hardware engineering experience abroad count toward J-1 Trainee eligibility?
Yes, but it must be documented carefully. The J-1 Trainee category requires at least one year of work experience or training outside the United States in your field prior to the exchange program. For hardware engineers, this means roles involving circuit design, embedded development, hardware testing, or related disciplines. Generic engineering experience in an unrelated field is unlikely to satisfy the designated sponsor's review.