Electrical Design Engineer Jobs at Google with Visa Sponsorship
Electrical Design Engineer roles at Google sit at the intersection of hardware innovation and large-scale infrastructure, covering everything from custom silicon power delivery to data center electrical systems. Google sponsors multiple work visa categories for this function, making it a realistic target if you're navigating U.S. work authorization.
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INTRODUCTION
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will have the opportunity to contribute to transformative projects at the forefront of quantum computing research. You will contribute to the quantum team’s mission by developing digital electronics for the control and readout of our quantum computers. You will be part of a team developing electronics for our current and next generation quantum computers and, in this context, will own development projects, working with quantum engineers, software engineers, and other hardware engineers to scope out, architect, and implement FPGA based systems.
You will have a deep understanding of the FPGA development cycle, from microarchitecture, RTL development, verification, bit file generation to hardware debugging. You will take ownership of projects and deliver reliable systems. Adept debugging skills on FPGAs and debugging failures after deployment is essential for this role. You will be passionate to guide a lean team to achieve team’s goals and employ effective communication skills to facilitate seamless collaboration across multidisciplinary teams.
The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.
ROLE AND RESPONSIBILITIES
- Profile and optimize FPGA designs to improve performance, latency, and power efficiency while maintaining design documentation and communicate progress and findings effectively in meetings and reviews.
- Identify and resolve issues in RTL and post-synthesis stages using debugging tools and methodologies.
- Create testbenches and plans to verify FPGA designs, ensuring functionality and correctness through simulations and testing.
- Collaborate with quantum physicists and hardware engineers to define and implement scalable FPGA architectures optimized for quantum computing systems.
- Develop efficient microarchitecture, RTL code using Verilog/SystemVerilog to realize complex digital logic designs on FPGAs. Utilize tools like Vivado or Quartus Prime to synthesize.
MINIMUM QUALIFICATIONS
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
- 4 years of experience in Field Programmable Gate Array (FPGA) design and development.
- 4 years of experience with RTL design using Verilog or SystemVerilog.
PREFERRED QUALIFICATIONS
- Master's or PhD degree in Electrical Engineering, Computer Engineering, Physics, or a related field.
- 1 year of experience in technical leadership.
The US base salary range for this full-time position is $159,000-$231,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

INTRODUCTION
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will have the opportunity to contribute to transformative projects at the forefront of quantum computing research. You will contribute to the quantum team’s mission by developing digital electronics for the control and readout of our quantum computers. You will be part of a team developing electronics for our current and next generation quantum computers and, in this context, will own development projects, working with quantum engineers, software engineers, and other hardware engineers to scope out, architect, and implement FPGA based systems.
You will have a deep understanding of the FPGA development cycle, from microarchitecture, RTL development, verification, bit file generation to hardware debugging. You will take ownership of projects and deliver reliable systems. Adept debugging skills on FPGAs and debugging failures after deployment is essential for this role. You will be passionate to guide a lean team to achieve team’s goals and employ effective communication skills to facilitate seamless collaboration across multidisciplinary teams.
The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.
ROLE AND RESPONSIBILITIES
- Profile and optimize FPGA designs to improve performance, latency, and power efficiency while maintaining design documentation and communicate progress and findings effectively in meetings and reviews.
- Identify and resolve issues in RTL and post-synthesis stages using debugging tools and methodologies.
- Create testbenches and plans to verify FPGA designs, ensuring functionality and correctness through simulations and testing.
- Collaborate with quantum physicists and hardware engineers to define and implement scalable FPGA architectures optimized for quantum computing systems.
- Develop efficient microarchitecture, RTL code using Verilog/SystemVerilog to realize complex digital logic designs on FPGAs. Utilize tools like Vivado or Quartus Prime to synthesize.
MINIMUM QUALIFICATIONS
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
- 4 years of experience in Field Programmable Gate Array (FPGA) design and development.
- 4 years of experience with RTL design using Verilog or SystemVerilog.
PREFERRED QUALIFICATIONS
- Master's or PhD degree in Electrical Engineering, Computer Engineering, Physics, or a related field.
- 1 year of experience in technical leadership.
The US base salary range for this full-time position is $159,000-$231,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
See all 40+ Electrical Design Engineer at Google jobs
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Get Access To All JobsTips for Finding Electrical Design Engineer Jobs at Google Jobs
Align your portfolio to Google's hardware scale
Google's electrical design work spans custom ASICs, TPU power systems, and hyperscale data center infrastructure. Tailor your resume and project portfolio to reflect experience at that scale, not consumer-grade or small-batch hardware.
Pursue roles tied to specific hardware programs
Google posts Electrical Design Engineer openings under distinct product lines like Platforms and Ecosystems or Google Cloud infrastructure. Targeting a specific program increases your visibility and signals domain fit to technical recruiters who screen for both.
Request premium processing during the offer negotiation
H-1B petitions filed by large employers like Google can take months under standard USCIS processing. Raise premium processing during offer negotiation, not after signing, since the timeline affects your start date and any OPT or grace period you're managing.
Search for sponsored Electrical Design Engineer openings on Migrate Mate
Filter by Google and visa type on Migrate Mate to surface active Electrical Design Engineer roles confirmed for sponsorship, so you're applying to postings that match your authorization needs rather than guessing from a general job board.
Prepare your credential equivalency documentation early
If your electrical engineering degree is from outside the U.S., obtain a credential evaluation before Google's immigration team files your petition. USCIS scrutinizes foreign degrees in specialty occupation filings, and a recognized evaluation removes a common source of RFEs.
Electrical Design Engineer at Google jobs are hiring across the US. Find yours.
Find Electrical Design Engineer at Google JobsFrequently Asked Questions
Does Google sponsor H-1B visas for Electrical Design Engineers?
Yes, Google sponsors H-1B visas for Electrical Design Engineer roles. Because Google qualifies as a cap-exempt employer through its research activities, it can file H-1B petitions outside the annual lottery, which means your start date isn't locked to the October 1 cap cycle. Premium processing is also available to compress the USCIS adjudication timeline.
How do I apply for Electrical Design Engineer jobs at Google?
Applications go through Google's careers portal at careers.google.com. Search by job family, team, or location and apply directly to individual postings. You can also browse Electrical Design Engineer roles confirmed for visa sponsorship on Migrate Mate, which filters specifically for openings where authorization support has been documented, saving you from sifting through postings that don't apply to your situation.
Which visa types does Google use for Electrical Design Engineer roles?
Google files H-1B petitions for most nationalities, H-1B1 petitions for Chilean and Singaporean nationals, and E-3 petitions for Australian citizens. All three categories require the role to qualify as a specialty occupation, which Electrical Design Engineer positions at Google consistently meet given the degree requirements and technical complexity involved.
What qualifications does Google expect for Electrical Design Engineer candidates?
Google typically expects a bachelor's degree in electrical engineering or a closely related field, with a master's or Ph.D. preferred for senior-level roles. Hands-on experience with PCB design, power integrity, signal integrity, or ASIC bring-up is commonly cited in job descriptions. Familiarity with tools like Cadence, Mentor, or equivalent EDA software is expected for most levels.
How do I time my application around visa processing if I'm on OPT?
If you're on F-1 OPT, your STEM OPT extension gives you up to 24 additional months of work authorization after your initial 12-month OPT, which typically provides enough runway to complete Google's hiring process and allow USCIS to adjudicate your H-1B petition. File the STEM OPT extension with your Designated School Official at least 90 days before your OPT expires to avoid a gap.
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