CPT Senior Asic Design Engineer Jobs
Senior ASIC Design Engineers work in RTL design, physical implementation, and verification, all areas where CPT authorization requires your DSO to confirm the work integrates directly with your coursework. Semiconductor and chip design roles at this level typically require a master's or PhD program in electrical engineering or computer engineering to qualify.
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Get Access To All JobsSr AI UX and UI Developer
As a Sr UX and UI Developer here at Honeywell, you will play a crucial role in designing and implementing advanced data solutions for AI solutions that drive business insights, enhance decision-making processes and empower AI solutions. Your expertise will help in critical AI development activities across all AI modalities (classic, Gen and agentic) and data types (structured and unstructured).
You will report directly to our AI Director and you’ll work out of our Phoenix, AZ or Charlotte, NC location on a hybrid work schedule.
Key Responsibilities
- Design and develop intuitive, performant, and scalable user interfaces for AI-powered applications, spanning classic ML insights, GenAI experiences, and emerging agentic AI interfaces.
- Build modern front-end applications using React, integrating with backend AI services, RAG pipelines, agent orchestration engines, and data APIs.
- Design and implement agentic interaction patterns, including multi-step agent workflows, tool invocation visualizations, conversational UI, human-in-the-loop controls, and AI traceability interfaces.
- Develop rich data visualizations and dashboards using Tableau to present model outputs, system telemetry, quality metrics, and user-facing insights.
- Translate complex AI concepts—model predictions, confidence scores, agent reasoning chains, retrieval context—into clean, understandable, and human-centered UI components.
- Collaborate closely with AI architects, data scientists, ML engineers, and software developers to ensure front-end interfaces are aligned with backend AI capabilities.
- Conduct user research, usability testing, and iterative design cycles to refine interface behavior, accessibility, and task success rates.
- Create reusable design components, UI style guides, and UX standards for AI-driven applications across multiple business domains.
- Ensure high standards of code quality, performance, security, accessibility, and responsiveness across devices.
Sr AI UX and UI Developer
As a Sr UX and UI Developer here at Honeywell, you will play a crucial role in designing and implementing advanced data solutions for AI solutions that drive business insights, enhance decision-making processes and empower AI solutions. Your expertise will help in critical AI development activities across all AI modalities (classic, Gen and agentic) and data types (structured and unstructured).
You will report directly to our AI Director and you’ll work out of our Phoenix, AZ or Charlotte, NC location on a hybrid work schedule.
Key Responsibilities
- Design and develop intuitive, performant, and scalable user interfaces for AI-powered applications, spanning classic ML insights, GenAI experiences, and emerging agentic AI interfaces.
- Build modern front-end applications using React, integrating with backend AI services, RAG pipelines, agent orchestration engines, and data APIs.
- Design and implement agentic interaction patterns, including multi-step agent workflows, tool invocation visualizations, conversational UI, human-in-the-loop controls, and AI traceability interfaces.
- Develop rich data visualizations and dashboards using Tableau to present model outputs, system telemetry, quality metrics, and user-facing insights.
- Translate complex AI concepts—model predictions, confidence scores, agent reasoning chains, retrieval context—into clean, understandable, and human-centered UI components.
- Collaborate closely with AI architects, data scientists, ML engineers, and software developers to ensure front-end interfaces are aligned with backend AI capabilities.
- Conduct user research, usability testing, and iterative design cycles to refine interface behavior, accessibility, and task success rates.
- Create reusable design components, UI style guides, and UX standards for AI-driven applications across multiple business domains.
- Ensure high standards of code quality, performance, security, accessibility, and responsiveness across devices.
See all 162+ Senior Asic Design Engineer jobs
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Get Access To All JobsSenior Asic Design Engineer CPT: Frequently Asked Questions
Does a Senior ASIC Design Engineer role qualify for CPT authorization?
Yes, if your program in electrical engineering, computer engineering, or a directly related field includes coursework in digital design, VLSI, or semiconductor systems. Your DSO evaluates whether the specific job tasks, such as RTL coding, synthesis flows, or timing closure, are an integral part of your current curriculum. A generic job title alone isn't sufficient; the role description must map to your enrolled courses.
Can I do full-time CPT as a Senior ASIC Design Engineer without losing OPT?
Full-time CPT of twelve months or more eliminates your OPT eligibility entirely, including your STEM OPT extension. Most senior ASIC roles are structured as full-time positions, so track your cumulative CPT days precisely. If you're close to the twelve-month threshold, talk to your DSO about structuring the authorization as part-time CPT or phasing the engagement across semesters to protect your post-graduation options.
What should I look for in an employer to ensure smooth CPT authorization?
Prioritize employers in the semiconductor, defense electronics, or EDA sectors who have previously hired F-1 students and understand DSO documentation requirements. Confirm the company is enrolled in E-Verify, since that's required for any STEM OPT extension after your CPT ends. You can search employers with verified LCA filing history in ASIC and hardware engineering roles on Migrate Mate before committing to an application.
How does the ASIC engineering job classification affect my CPT and future visa filings?
Senior ASIC Design Engineers typically fall under SOC code 17-2061 (Electrical Engineers) or 15-1299 in some classifications, which O*NET categorizes as requiring at least a bachelor's degree in a directly related field. This specialty occupation classification matters when your employer later files an H-1B or O-1 petition, since the role must demonstrate that a specific technical degree is required, not just preferred, for the position.
What happens to my CPT authorization if my employer changes my project or team mid-engagement?
CPT is authorized for a specific employer and type of work. If your responsibilities shift substantially, such as moving from front-end RTL design to a marketing or program management function, your existing CPT authorization may no longer cover the new work. Report any significant scope changes to your DSO immediately and request an updated I-20 that reflects the revised job duties before continuing in the new capacity.
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