Design Engineer Jobs in Santa Clara, CA
Design Engineer jobs in Santa Clara are in strong demand, concentrated in the Central Expressway corridor, the Lawrence Expressway tech belt, and the Silicon Valley Power district, across semiconductor, consumer electronics, and defense systems sectors. Leading employers right now include NVIDIA, AMD, and Intel Corporation. Scan the live roles below and apply to whichever ones fit.
Find Design Engineer JobsOverview
Showing 5 of 882+ Design Engineer jobs
Company:
Qualcomm Technologies, Inc.Job Area:
Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:
This individual independently plans, performs the moderately-defined responsibility for the Physical Design Flow of high-speed DDR, graphics, physical verification flows, microarchitecture, SOC algorithm design and modeling, and methodology, focusing on target power utilization and optimization for system-on-chip (SoC) products and how these features impact power and performance. Responsibilities include: Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis and closure. Performs various physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield) at the chip and block levels. Provides schedules and support cross-functional engineering effort to drive to signoff closure for tapeout. Acts as a strong contributor at design reviews and project meetings.
Will accept a Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field.
Pay Range: $146,717.00 - $190,100.00/year
Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
If you would like more information about this role, please contact Qualcomm Careers .
Company:
Qualcomm Technologies, Inc.Job Area:
Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:
This individual independently plans, performs the moderately-defined responsibility for the Physical Design Flow of high-speed DDR, graphics, physical verification flows, microarchitecture, SOC algorithm design and modeling, and methodology, focusing on target power utilization and optimization for system-on-chip (SoC) products and how these features impact power and performance. Responsibilities include: Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis and closure. Performs various physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield) at the chip and block levels. Provides schedules and support cross-functional engineering effort to drive to signoff closure for tapeout. Acts as a strong contributor at design reviews and project meetings.
Will accept a Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field.
Pay Range: $146,717.00 - $190,100.00/year
Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
If you would like more information about this role, please contact Qualcomm Careers .
See All 882+ Design Engineer Jobs in Santa Clara
Find roles in Santa Clara that match your experience and apply in just a few clicks.
Find Design Engineer JobsDesign Engineer Job Market in Santa Clara
Who's Hiring
- NVIDIA287
- AMD74
- Intel Corporation74
- Marvell Technology53
- SiFive43
Top Industries Hiring
- Technology & Software276
- Electronics & Hardware117
- Agriculture & Farming11
Design Engineer Jobs in Santa Clara: Frequently Asked Questions
How do I get a design engineer job in Santa Clara?
Focus your search on Santa Clara's semiconductor and consumer electronics employers, which cluster along the Central Expressway corridor and near Great America Parkway. Companies in chip design, power systems, and hardware engineering hire the most design engineers locally. Candidates who can demonstrate hands-on CAD or circuit design experience and familiarity with ASIC or PCB workflows have a clear edge in this market.
Which companies hire design engineers in Santa Clara?
Santa Clara design engineer roles are posted by NVIDIA, AMD, and Intel Corporation and others right now, based on current listings on Migrate Mate as of August 2026. Santa Clara's employer mix skews heavily toward semiconductor fabricators, consumer electronics firms, and defense contractors, many of which maintain engineering centers in the city's industrial and tech park zones.
Are there remote design engineer jobs in Santa Clara?
Yes, though the role leans on-site for hardware-heavy work like lab testing, prototyping, and manufacturing oversight. About 39% of design engineer openings tied to Santa Clara are remote or hybrid as of August 2026, with remote options most common for firmware, simulation, or systems-level design work that doesn't require physical lab access.
How can I get a design engineer job in Santa Clara with little or no experience?
The most realistic entry path in Santa Clara is targeting associate or junior engineer roles at mid-size semiconductor and electronics firms, which hire more entry-level candidates than large corporations. Contract-to-hire positions at local hardware startups near the Lawrence Station area are also a practical foot in the door. A strong portfolio of CAD projects, internship experience at a Silicon Valley company, or a relevant senior design capstone project substantially improves your chances.
Which industries hire the most design engineers in Santa Clara?
Santa Clara design engineer roles concentrate in Technology & Software, Electronics & Hardware, and Agriculture & Farming, based on current listings on Migrate Mate as of August 2026. Santa Clara's position as the historic center of Silicon Valley means semiconductor manufacturing, wireless communications, and power electronics companies are especially dense here, generating steady demand for design engineering talent across all experience levels.
Related Jobs in California
See All 882+ Design Engineer Jobs in Santa Clara
Find roles in Santa Clara that match your experience and apply in just a few clicks.
Find Design Engineer Jobs