Senior Level Director of Application Engineering Jobs
Senior level director of application engineering jobs place experienced engineering leaders in charge of platform strategy, cross-functional execution, and the teams building production systems at scale. Openings concentrate across Technology & Software, Distribution & Wholesale, and Electronics & Hardware, with a mix of on-site, hybrid, and remote positions available, and employers like Siemens, Roblox, and ARTERIS hiring at this level now.
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[Senior Manager Field Application Engineer]
Location: [Campbell CA”]
Arteris connects innovation.
Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarter, faster semiconductors, including SoCs and chiplets. From the car you drive to AI in the cloud, Arteris connects the innovative technologies shaping tomorrow.
What You’ll Do as a Senior Manager Field Application Engineer at Arteris:
Join our innovative team and help shape the future of semiconductor technology, including SoCs and chiplets. In this role, you will lead and develop the US Field Application Engineering team, supporting customers as they adopt Arteris interconnect and cache IP. You will work across customer engagements and internal teams to help solve complex design challenges, support account growth, and bring customer needs into product planning.
Your deep understanding of digital design—from SoC architecture through implementation—along with your enthusiasm for technology, creativity, problem-solving skills, and excellent communication abilities, will make you a valued leader on our customer success team.
You will help influence the architecture of primary on-chip interconnects and coherent interconnects in cutting-edge SoC designs.
Key Responsibilities:
- Lead and develop Field Application Engineering teams supporting non-coherent and cache-coherent interconnect and Last Level Cache IP.
- Provide team leadership through mentoring, resource planning, and regional pre-sales and post-sales support.
- Define and guide customer engagements from pre-sales and design-in through verification and production to promote account growth and reduce late-stage escalations.
- Deliver technical keynotes, application notes, and product demonstrations at conferences.
- Apply deep knowledge of NoC, AMBA (CHI, AXI, ACE, AHB), OCP, system-level deadlocks, SoC architecture, verification and emulation methodologies, and ASIC design and implementation flows.
- Influence product roadmaps based on customer requirements and architecture.
- Travel approximately 15%–25%.
- Collaborate with teams across the USA, EMEAI, APAC, Israel, and India.
What You Bring:
- At least 5 years of experience leading and developing technical teams.
- 10–15 years of front-end digital SoC design experience, from RTL through synthesis.
- Strong understanding of system-on-chip architecture and semiconductor design flows.
- Good knowledge of AMBA protocols, as well as PCIe, CXL, die-to-die, and chip-to-chip interfaces.
- Team-oriented approach and excellent communication and presentation skills.
- Motivation to train and educate others to help solve complex problems.
- Proactive, customer-focused professionalism.
- Strong analytical and problem-solving abilities.
- Experience applying AI and agentic AI workflows to SoC design.
- This position follows a hybrid work model.
Bonus Points If You Have:
- Familiarity with the ARM and RISC-V ecosystems, including CPUs, interfaces, and interconnect fabrics.
- Understanding of cache coherency and on-chip networks.
- Knowledge of high-performance computing and AI hardware architectures.
- Knowledge of place and route, timing closure, SystemC, HDL simulation, Python, Tcl, and UNIX/Linux.
Education Requirements:
- BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- MS preferred.
Estimated Base Salary:
- $180,000–$200,000 annually.
About Arteris
Arteris is a global leader in system IP for semiconductors, helping accelerate the creation of high-performance, power-efficient silicon. The world’s top semiconductor and technology companies use Arteris network-on-chip (NoC) interconnect IP, system-on-chip (SoC) integration automation software, and hardware security assurance technology to improve performance and engineering productivity, reduce risk and costs, and bring complex designs to market faster.
With more than 380 team members headquartered in Silicon Valley and offices around the world, we work with startups and global technology leaders to build the next generation of electronic products. We believe in people, purpose, and impact. Join us and help shape what comes next.
We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.
[Senior Manager Field Application Engineer]
Location: [Campbell CA”]
Arteris connects innovation.
Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarter, faster semiconductors, including SoCs and chiplets. From the car you drive to AI in the cloud, Arteris connects the innovative technologies shaping tomorrow.
What You’ll Do as a Senior Manager Field Application Engineer at Arteris:
Join our innovative team and help shape the future of semiconductor technology, including SoCs and chiplets. In this role, you will lead and develop the US Field Application Engineering team, supporting customers as they adopt Arteris interconnect and cache IP. You will work across customer engagements and internal teams to help solve complex design challenges, support account growth, and bring customer needs into product planning.
Your deep understanding of digital design—from SoC architecture through implementation—along with your enthusiasm for technology, creativity, problem-solving skills, and excellent communication abilities, will make you a valued leader on our customer success team.
You will help influence the architecture of primary on-chip interconnects and coherent interconnects in cutting-edge SoC designs.
Key Responsibilities:
- Lead and develop Field Application Engineering teams supporting non-coherent and cache-coherent interconnect and Last Level Cache IP.
- Provide team leadership through mentoring, resource planning, and regional pre-sales and post-sales support.
- Define and guide customer engagements from pre-sales and design-in through verification and production to promote account growth and reduce late-stage escalations.
- Deliver technical keynotes, application notes, and product demonstrations at conferences.
- Apply deep knowledge of NoC, AMBA (CHI, AXI, ACE, AHB), OCP, system-level deadlocks, SoC architecture, verification and emulation methodologies, and ASIC design and implementation flows.
- Influence product roadmaps based on customer requirements and architecture.
- Travel approximately 15%–25%.
- Collaborate with teams across the USA, EMEAI, APAC, Israel, and India.
What You Bring:
- At least 5 years of experience leading and developing technical teams.
- 10–15 years of front-end digital SoC design experience, from RTL through synthesis.
- Strong understanding of system-on-chip architecture and semiconductor design flows.
- Good knowledge of AMBA protocols, as well as PCIe, CXL, die-to-die, and chip-to-chip interfaces.
- Team-oriented approach and excellent communication and presentation skills.
- Motivation to train and educate others to help solve complex problems.
- Proactive, customer-focused professionalism.
- Strong analytical and problem-solving abilities.
- Experience applying AI and agentic AI workflows to SoC design.
- This position follows a hybrid work model.
Bonus Points If You Have:
- Familiarity with the ARM and RISC-V ecosystems, including CPUs, interfaces, and interconnect fabrics.
- Understanding of cache coherency and on-chip networks.
- Knowledge of high-performance computing and AI hardware architectures.
- Knowledge of place and route, timing closure, SystemC, HDL simulation, Python, Tcl, and UNIX/Linux.
Education Requirements:
- BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- MS preferred.
Estimated Base Salary:
- $180,000–$200,000 annually.
About Arteris
Arteris is a global leader in system IP for semiconductors, helping accelerate the creation of high-performance, power-efficient silicon. The world’s top semiconductor and technology companies use Arteris network-on-chip (NoC) interconnect IP, system-on-chip (SoC) integration automation software, and hardware security assurance technology to improve performance and engineering productivity, reduce risk and costs, and bring complex designs to market faster.
With more than 380 team members headquartered in Silicon Valley and offices around the world, we work with startups and global technology leaders to build the next generation of electronic products. We believe in people, purpose, and impact. Join us and help shape what comes next.
We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.
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Senior Level Director of Application Engineering Jobs: Frequently Asked Questions
How do I get a senior level director of application engineering job?
Employers at this level look for candidates who have owned end-to-end engineering delivery, not just contributed to it. Demonstrable experience leading multi-team programs, setting architectural direction, and mentoring staff or principal engineers gives candidates a clear edge. A strong portfolio of shipped products, measurable reliability or performance outcomes, and experience influencing roadmap priorities across business and engineering stakeholders rounds out what hiring committees want to see.
Which companies hire senior level director of application engineerings?
Companies hiring senior level director of application engineerings right now include Siemens, Roblox, and ARTERIS, based on current listings on Migrate Mate as of November 2026. At this level, hiring tends to come from technology-intensive enterprises, growth-stage companies scaling their engineering organizations, and large institutions modernizing legacy application platforms.
Are there remote senior level director of application engineering jobs?
Yes, though availability varies by employer and industry. About 100% of senior level director of application engineering openings are remote or hybrid as of November 2026, reflecting strong demand for experienced engineering leaders who can operate effectively across distributed teams. On-site roles do exist, particularly at companies with large co-located engineering organizations or regulated environments.
What makes a director of application engineering role senior level?
Senior level director of application engineering roles are defined by scope and ownership. These positions carry accountability for multiple product lines or engineering domains, require setting long-range technical strategy rather than executing against one handed down, and involve active mentoring or development of other engineering managers and senior contributors. Cross-functional influence, budget ownership, and responsibility for organizational hiring and structure are common at this stage.
Which industries hire the most senior level director of application engineerings?
Senior Level director of application engineering roles concentrate in Technology & Software, Distribution & Wholesale, and Electronics & Hardware, based on current listings on Migrate Mate as of November 2026. These sectors drive hiring at this level because they operate complex, high-availability application ecosystems that require experienced leaders to own delivery quality, platform scalability, and engineering team performance.