Remote DFT Engineer Jobs
Remote DFT Engineer jobs are open across the semiconductor, consumer electronics, and EDA software sectors at remote-first chip design firms, distributed fabless teams, and hardware-focused startups. Employers hiring remotely right now include Encore Semi, Positron AI, and Delos Data. Scan the live roles below and apply to whichever ones fit.
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INTRODUCTION
Celero Communications is seeking a talented DFT Engineer to join our silicon engineering organization. This individual will partner with design, verification, physical design, product, and manufacturing teams to implement robust Design-for-Test methodologies that enable high-quality, high-volume production of complex ASIC and SoC products.
ROLE AND RESPONSIBILITIES
- Develop and implement DFT architecture for ASIC and SoC designs.
- Perform scan insertion, scan chain planning, and scan compression implementation.
- Generate and validate ATPG patterns and analyze fault coverage results.
- Implement and verify MBIST, and other on-chip test features.
- Collaborate with RTL, verification, and physical design teams to ensure successful DFT integration.
- Support JTAG and boundary-scan implementation and debug.
- Drive DFT signoff activities and manufacturing test readiness.
- Participate in silicon bring-up, failure analysis, and yield improvement efforts.
BASIC QUALIFICATIONS
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of ASIC/SoC DFT experience.
- Strong understanding of scan, ATPG, fault models, and test coverage methodologies.
- Experience with Synopsys TestMAX/TetraMAX, DFT Compiler, Siemens Tessent, Cadence Modus, or equivalent tools.
- Knowledge of Verilog/SystemVerilog and digital design fundamentals.
- Experience in Linux and scripting using Python, Tcl, Perl, or Shell.
- Results-driven engineer with strong debugging abilities.
- Comfortable working in fast-paced cross-functional environments.
- Passion for delivering high-quality silicon products.
PREFERRED QUALIFICATIONS
- Experience with advanced-node semiconductor technologies.
- Hands-on experience with MBIST, compression architectures, and JTAG.
- Knowledge of timing closure, physical design impacts, and low-power design techniques.
- Experience supporting silicon validation and manufacturing production ramps.
- Strong communication and cross-functional collaboration skills.
INTRODUCTION
Celero Communications is seeking a talented DFT Engineer to join our silicon engineering organization. This individual will partner with design, verification, physical design, product, and manufacturing teams to implement robust Design-for-Test methodologies that enable high-quality, high-volume production of complex ASIC and SoC products.
ROLE AND RESPONSIBILITIES
- Develop and implement DFT architecture for ASIC and SoC designs.
- Perform scan insertion, scan chain planning, and scan compression implementation.
- Generate and validate ATPG patterns and analyze fault coverage results.
- Implement and verify MBIST, and other on-chip test features.
- Collaborate with RTL, verification, and physical design teams to ensure successful DFT integration.
- Support JTAG and boundary-scan implementation and debug.
- Drive DFT signoff activities and manufacturing test readiness.
- Participate in silicon bring-up, failure analysis, and yield improvement efforts.
BASIC QUALIFICATIONS
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of ASIC/SoC DFT experience.
- Strong understanding of scan, ATPG, fault models, and test coverage methodologies.
- Experience with Synopsys TestMAX/TetraMAX, DFT Compiler, Siemens Tessent, Cadence Modus, or equivalent tools.
- Knowledge of Verilog/SystemVerilog and digital design fundamentals.
- Experience in Linux and scripting using Python, Tcl, Perl, or Shell.
- Results-driven engineer with strong debugging abilities.
- Comfortable working in fast-paced cross-functional environments.
- Passion for delivering high-quality silicon products.
PREFERRED QUALIFICATIONS
- Experience with advanced-node semiconductor technologies.
- Hands-on experience with MBIST, compression architectures, and JTAG.
- Knowledge of timing closure, physical design impacts, and low-power design techniques.
- Experience supporting silicon validation and manufacturing production ramps.
- Strong communication and cross-functional collaboration skills.
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Find Remote DFT Engineer JobsRemote DFT Engineer Job Market
Who's Hiring
Top Industries Hiring
- Electronics & Hardware
What Employers Look For
The qualifications that appear most often in remote DFT engineer jobs.
- Bachelor's or master's degree in electrical engineering or computer engineering
- Hands-on experience with ATPG tools such as Synopsys TetraMAX, Cadence Modus, or Siemens Tessent
- Proficiency in scan insertion, BIST design, and boundary scan implementation
- Experience achieving and documenting stuck-at and transition fault coverage targets
- Familiarity with industry-standard test protocols including JTAG and IEEE 1500
- Scripting skills in Python, Tcl, or Perl for test flow automation and debug
Tips for Your Remote DFT Engineer Job Search
Apply early to remote roles that fit
Migrate Mate lists remote dft engineer openings from across the U.S. in one place, so you can find roles that match your tool experience and apply directly without sifting through postings mixed with on-site work.
Show async collaboration in your resume
Remote dft teams coordinate handoffs across time zones through written specs, shared simulation logs, and async design reviews. Call out specific examples where you documented scan insertion decisions or fault coverage trade-offs in writing for a distributed team.
Build a shareable DFT artifact before you apply
Remote hiring managers can't watch you work, so give them something concrete: a GitHub repo with an RTL design and scan chain you inserted, an ATPG coverage report, or a written DFT architecture decision you can walk through on a video call.
Prep for tool-specific remote screen questions
Remote dft interviews lean heavily on tool fluency because employers can't assess hands-on skills in person. Practice explaining your Tessent, TestMAX, or Cadence Modus workflows out loud, including how you handle ATPG run times, compression trade-offs, and test point insertion decisions.
Remote DFT Engineer Jobs: Frequently Asked Questions
How do I get a remote dft engineer job?
Target companies with distributed chip design teams, since remote dft roles cluster at fabless semiconductor firms and EDA software companies that already operate without a central lab. Remote employers screen for proficiency in ATPG tools, scan insertion flows, and fault simulation, plus the ability to coordinate handoffs asynchronously with RTL, physical design, and verification teams. A portfolio of tape-out contributions or published test coverage results gives you a concrete edge over candidates who can only describe their work verbally.
Which companies hire remote dft engineers?
Remote dft engineer roles are posted by Encore Semi, Positron AI, and Delos Data and others right now, based on current remote listings on Migrate Mate as of November 2026. These tend to be fabless semiconductor companies, EDA tool vendors, and consumer electronics firms that run distributed design teams and treat physical colocation as optional for DFT-stage work.
Can you get a remote dft engineer job with no experience?
Yes, but remote entry-level dft roles are harder to land because employers expect you to ramp up independently without on-site mentorship. Your strongest asset is demonstrable hands-on work: academic tape-out projects, open-source RTL with scan chains you inserted yourself, or coursework using commercial ATPG tools. Smaller fabless startups and EDA vendors are the most likely to take a chance on an entry-level candidate who can show real simulation results rather than just a transcript.
Do you need a degree for remote dft engineer jobs?
Usually, but the degree requirement is more flexible at the experience level than at the entry level. Remote employers care most about demonstrated fluency in scan architecture, ATPG pattern generation, and fault coverage analysis. Candidates who can show tape-out experience, strong tool proficiency in Tessent or Synopsys TestMAX, and clear written documentation of their DFT methodology often compete effectively against degree holders, especially for contract and senior-level remote roles.
Which industries hire the most remote dft engineers?
Remote dft engineer roles concentrate in Electronics & Hardware, based on current remote listings on Migrate Mate as of November 2026. These sectors rely on distributed design teams where DFT work happens in parallel with RTL and physical design, making it practical to place dft engineers fully remote without slowing the tape-out schedule.
See All 14 Remote DFT Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
Find Remote DFT Engineer Jobs