Mid Level SoC Physical Design Engineer Jobs
Mid level soc physical design engineer jobs go to engineers ready to own full chip implementation flows, drive floorplan and timing closure decisions with limited oversight, and mentor junior teammates through complex physical design challenges. Hiring runs across Electronics & Hardware and Technology & Software, with Apple, NVIDIA, and Micron Technology competing for engineers at this level now.
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SUMMARY
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology.
DESCRIPTION
- Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
- Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals.
- Timing, physical and electrical verification and driving the signoff closure for the partitions.
- Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.
MINIMUM QUALIFICATIONS
- Minimum BS and 3+ years of relevant industry experience.
- Experience with partition level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification.
- Knowledge of physical design construction and analysis flows and methodology.
- Experience with industry standard tools, understanding their capabilities and underlying algorithms.
PREFERRED QUALIFICATIONS
- Ability to adhere to stringent schedule and die size requirements.
- Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ.
- Experience with sub 10nm tech nodes.
- Strong communication skills.
COMPENSATION
- Base pay range for this role is between $150,400 and $277,600, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
Apple believes accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Apple accepts applications to this posting on an ongoing basis.
SUMMARY
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology.
DESCRIPTION
- Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
- Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals.
- Timing, physical and electrical verification and driving the signoff closure for the partitions.
- Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.
MINIMUM QUALIFICATIONS
- Minimum BS and 3+ years of relevant industry experience.
- Experience with partition level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification.
- Knowledge of physical design construction and analysis flows and methodology.
- Experience with industry standard tools, understanding their capabilities and underlying algorithms.
PREFERRED QUALIFICATIONS
- Ability to adhere to stringent schedule and die size requirements.
- Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ.
- Experience with sub 10nm tech nodes.
- Strong communication skills.
COMPENSATION
- Base pay range for this role is between $150,400 and $277,600, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
Apple believes accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Apple accepts applications to this posting on an ongoing basis.
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Top Industries Hiring
- Electronics & Hardware
- Technology & Software
Mid Level SoC Physical Design Engineer Jobs: Frequently Asked Questions
How do I get a mid level soc physical design engineer job?
Position your experience around ownership, not just contribution. Highlight tapeouts you drove, timing constraints you closed, or floorplan decisions you made independently rather than executed under direction. Recruiters at this level want evidence that you can take a block or subsystem from RTL handoff to signoff with minimal hand-holding. Tailor your resume to show results, not just tool familiarity, and be ready to walk through a specific implementation challenge in interviews.
Which companies hire mid level soc physical design engineers?
Companies hiring mid level soc physical design engineers right now include Apple, NVIDIA, and Micron Technology, based on current listings on Migrate Mate as of November 2026. Hiring at this level comes from a mix of semiconductor companies, fabless chip designers, and large technology firms with in-house silicon teams that need engineers who can own design stages independently.
Are there remote mid level soc physical design engineer jobs?
Yes, though physical design roles have historically been more on-site than many engineering disciplines due to EDA tool licensing and lab access requirements. About 0% of mid level soc physical design engineer openings are remote or hybrid as of November 2026, so options exist but on-site and hybrid arrangements still dominate at this level. Filtering by work setting when you search will quickly surface which employers offer flexibility.
How do I move up to a mid level soc physical design engineer role?
The transition from early-career to mid level happens when you shift from executing defined tasks to owning outcomes. Build depth in a specific area, such as floorplanning, static timing analysis, or power grid design, until you can troubleshoot independently. Take on tapeout responsibilities, document your decisions, and seek out projects where you are accountable for block-level signoff. Measurable contributions to successful tapeouts are the clearest signal to hiring managers that you are ready for mid level scope.
Which industries hire the most mid level soc physical design engineers?
Mid Level soc physical design engineer roles concentrate in Electronics & Hardware and Technology & Software, based on current listings on Migrate Mate as of November 2026. These sectors drive hiring at this level because they are actively developing custom silicon, pushing performance and power boundaries, and need engineers with enough experience to execute complex implementation work without close supervision.