Application Engineer Jobs in Santa Clara, CA

About GlobalFoundries

GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power‑efficient and high‑performance solutions for high‑growth markets. GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity and sustainability. For more information, visit www.gf.com .

New College Graduates Overview:

We offer many full-time employment paths for recent graduates, which provide accelerated training in a fast-paced work environment, cross-functional working opportunities, and talent mobility. New college graduates are provided with mentorship, networking, and leadership opportunities, which give our new team members life-long connections and skills.

The Design Application Engineering Role:

The Design Application Engineering (AE) team serves as the technical bridge between customers and GF, helping customers evaluate, adopt, and successfully implement GF technologies. Design AEs engage from early design concept through tape-out, translating application and product requirements into technology and enablement recommendations, coordinating cross-functional experts, guiding the use of PDKs and design flows, and resolving technical barriers. Through customer interface and internal collaboration, technical problem-solving, and clear documentation, the team supports first-time-right design execution.

Summary of Role:

GlobalFoundries is seeking a new college graduate to join the team as a Design Application Engineer supporting technical engagement from design concept through tape-out, targeting first-time-right design execution. The engineer will build expertise in GF technologies, translate customer application requirements into differentiated technical solutions, coordinate discussions with internal experts, resolve adoption barriers, and create the technical collateral and execution plans needed to support customers and enable a successful design.

Essential Responsibilities include:

• Review and reproduce customer and enablement issues, technology application, design-flow requirements and recommend design enablement solutions aligned with those needs.
• Drive design enablement solutions with internal teams, subject matter experts, EDA partners, technology experts, to meet customer deadlines.
• Track actions, risks, customer cases and technical closure criteria.
• Take on internal business process projects to improve efficiency in a team or solo.
Develop customer-facing presentations, application notes, evaluation summaries, and technical documentation that communicate GF technology differentiation, address adoption barriers, provide design flow information, for customer and internal reference as part of our continuous GF improvement efforts.

Other Responsibilities:

• Perform all activities in a professional, safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

• Education – Graduating with Bachelor’s or Master’s in Electrical Engineering or related field from an accredited degree program .
• Must have at least an overall 3.0 GPA and proven good academic standing.
• Language Fluency - English (Written & Verbal)

Preferred Qualifications:

• Prior related internship or co-op experience.
• Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
• Strong interest in leveraging AI tools and emerging technologies to enhance productivity, streamline workflows, and support effective decision-making.
• Project management skills, i.e. the ability to innovate and execute solutions that matter; the ability to navigate ambiguity.
• Strong written and verbal communication skills
• Strong planning & organizational skills
• Coursework or project experience in digital design, place and route, standard-cell design, analog, silicon photonics or mixed-signal circuit design, simulation, layout, verification, or semiconductor device physics.
Familiarity with EDA tools, such as Cadence Virtuoso, Synopsys OptoCompiler, Calibre or Pegasus physical verification, Linux, Microsoft Office, Verilog or Verilog-AMS, process design kits (PDKs), IC design flows.

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Expected Salary Range

The exact Salary will be determined based on qualifications, experience and location.