ASIC Physical Design Engineer Jobs
ASIC Physical Design Engineer jobs are open across semiconductor, fabless IC design, and EDA companies, covering disciplines from floorplanning and place-and-route to timing closure and power analysis, at levels from new-grad to principal and staff engineer. Scan the live roles below and apply to whichever ones fit.
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Job Description:
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks.
Responsibilities Include:
Participate in large complex design implementations using the latest technology nodes.
Lead one or more disciplines in design closure as part of the design team.
Have expertise in multiple EDA vendor solutions and be able to quickly adapt to changing requirements.
Participate and drive peer reviews to ensure all quality requirements are met.
Work with customers and design teams across multiple geographies.
Job Complexity/Supervision:
Ability to work on complex technical projects
Exercises judgement in selecting methods, techniques and evaluation criteria for obtaining results
Complete tasks with little supervision, able to lead projects and set direction for other project members.
Experience:
Bachelors and 12+ years of related experience; or Masters degree and 10+ years of related experience; or PhD and 7+ years of related experience
Compensation and Benefits
The annual base salary range for this position is USD 143,800.00 To USD 230,000.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Please Note:
1. If you are a first time user, please create your candidate login account before you apply for a job.
2. If you already have a Candidate Account, please Sign-In before you apply.
Job Description:
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks.
Responsibilities Include:
Participate in large complex design implementations using the latest technology nodes.
Lead one or more disciplines in design closure as part of the design team.
Have expertise in multiple EDA vendor solutions and be able to quickly adapt to changing requirements.
Participate and drive peer reviews to ensure all quality requirements are met.
Work with customers and design teams across multiple geographies.
Job Complexity/Supervision:
Ability to work on complex technical projects
Exercises judgement in selecting methods, techniques and evaluation criteria for obtaining results
Complete tasks with little supervision, able to lead projects and set direction for other project members.
Experience:
Bachelors and 12+ years of related experience; or Masters degree and 10+ years of related experience; or PhD and 7+ years of related experience
Compensation and Benefits
The annual base salary range for this position is USD 143,800.00 To USD 230,000.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
ASIC Physical Design Engineer Jobs by Experience Level
See All 221+ ASIC Physical Design Engineer Jobs
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Find JobsASIC Physical Design Engineer Job Market
Who's Hiring
- Apple25
- Lockheed Martin18
- Hewlett Packard Enterprise | HPE14
- Cisco13
- Qualcomm12
Top Industries Hiring
- Technology & Software
- Electronics & Hardware
- Telecommunications
- Media & Entertainment
- Investment & Asset Management
What Employers Look For
The qualifications that appear most often in ASIC physical design engineer jobs.
- Bachelor's or master's degree in electrical engineering or computer engineering
- Proficiency in place-and-route tools such as Synopsys ICC2 or Cadence Innovus
- Experience with static timing analysis using PrimeTime or equivalent tools
- Hands-on work at advanced process nodes, typically 16nm or below
- Knowledge of power, performance, and area optimization techniques
- Familiarity with physical verification flows including DRC and LVS signoff
Tips for Your ASIC Physical Design Engineer Job Search
Tailor your resume to each node
Hiring teams screen heavily by process node experience. Call out your specific nodes front and center on your resume, whether that's 7nm, 5nm, or 3nm, and pair each with the EDA tools and design stages you owned at that node.
Show timing closure ownership clearly
Many candidates list timing work without specifying their depth of ownership. Clarify whether you closed timing independently, what slack margins you achieved, and which corners gave you the most trouble. That specificity separates you from candidates with similar titles.
Apply early to roles that fit
Migrate Mate lists asic physical design engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.
Target job descriptions by tool stack
Filter openings by the EDA tools named in the posting. If a team uses Synopsys ICC2 and you have deep Cadence Innovus experience, note the gap before applying and prepare a talking point on how quickly you've picked up new tools in the past.
Prepare for block-level and full-chip questions
Interviewers often probe whether your experience is block-level only or extends to full-chip integration. Know the largest hierarchy level you've worked at, the total gate count, and how you handed off or received data between teams at tape-out.
Negotiate with a competing offer or competing timeline
Physical design roles at fabless companies often have hard tape-out schedules that compress hiring timelines. If you have another offer or a pending deadline, state it early. Teams with active projects move faster when they know there's real urgency.
ASIC Physical Design Engineer Jobs: Frequently Asked Questions
Which companies are hiring the most asic physical design engineers?
Apple, Lockheed Martin, and Hewlett Packard Enterprise | HPE are hiring the most asic physical design engineers right now, with openings concentrated in California, Texas, and Colorado, based on current listings on Migrate Mate as of November 2026. Demand is especially active at fabless semiconductor companies and hyperscaler custom silicon teams.
How many asic physical design engineer jobs are remote?
About 47% of asic physical design engineer openings are fully remote or hybrid as of November 2026, which is lower than the broader tech average because EDA tool licenses, design data security requirements, and lab access often require on-site presence. Front-end physical design tasks like constraints authoring and floorplan reviews tend to be the most amenable to remote arrangements.
How do you become a asic physical design engineer?
Start with a bachelor's or master's degree in electrical engineering or computer engineering with coursework in VLSI design. Build hands-on experience through internships, university chip design programs, or open-source shuttle projects. Develop proficiency in a major place-and-route tool, work through a complete implementation flow from netlist to GDSII, and build fluency in timing analysis and physical verification signoff before applying.
How do you get hired as a asic physical design engineer with little experience?
Focus on completing at least one full physical implementation flow, even on a small block, using academic or free-tier EDA tools and an open-source PDK. University chip tape-out programs and multi-project wafer shuttles give you a real tapeout on your resume. Emphasize any exposure to timing closure, floorplanning decisions, or DRC debug work rather than listing tools generically.
What does the asic physical design engineer interview process look like?
Most processes start with a recruiter screen followed by a technical phone interview covering place-and-route concepts, timing analysis, and physical verification basics. An on-site or virtual loop typically includes a design exercise where you walk through a floorplan or timing debug scenario, plus depth interviews with physical design leads and sometimes a cross-functional review with RTL or verification engineers.
Where can I find and apply to asic physical design engineer jobs?
You can find and apply to asic physical design engineer jobs on Migrate Mate, which lists current openings from across the United States. Search the listings to find roles that match your node experience, tool stack, and seniority level, then apply directly to each one that fits.
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