Design Verification Jobs in San Jose, CA
Design Verification jobs in San Jose are concentrated in Silicon Valley's semiconductor and EDA corridors, with the heaviest hiring in North San Jose, the Alviso industrial zone, and the Downtown tech campus cluster across chip design, consumer electronics, and cloud hardware. Employers actively posting roles include Cisco, Micron Technology, and Astera Labs. Scan the live roles below and apply to whichever ones fit.
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AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
THE PERSON:
KEY RESPONSIBILITIES:
- Develop/Maintain tests for functional verification and performance verification at the core and SOC level
- Build testbench components to support the next generation IP
- Maintain or improve current test libraries to support IP level testing
- Responsible for closing verification quality metrics like pass rates, code coverage and functional coverage
- Provide technical support to other teams
PREFERRED EXPERIENCE:
- Good understanding of SOC architecture, computer architecture, especially CPU/DSP processors.
- Strong coding skills in Verilog/System Verilog, UVM, C/C++, Scripting languages such as Perl/Python.
- Strong analytical problem solving skills, attention to detail
- Good understanding in design flow, verification methodology and general computational logic design/verification concepts
- Excellent written and verbal communication skills
- Excellent interpersonal skills, self-motivated
- Prior experience to industry standard protocols such as AXI, AHB, PCIE, DDR etc. will be an advantage
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in computer engineering/Electrical Engineering
LOCATION: San Jose, CA
#LI-RL1
This role is not eligible for visa sponsorship.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
THE PERSON:
KEY RESPONSIBILITIES:
- Develop/Maintain tests for functional verification and performance verification at the core and SOC level
- Build testbench components to support the next generation IP
- Maintain or improve current test libraries to support IP level testing
- Responsible for closing verification quality metrics like pass rates, code coverage and functional coverage
- Provide technical support to other teams
PREFERRED EXPERIENCE:
- Good understanding of SOC architecture, computer architecture, especially CPU/DSP processors.
- Strong coding skills in Verilog/System Verilog, UVM, C/C++, Scripting languages such as Perl/Python.
- Strong analytical problem solving skills, attention to detail
- Good understanding in design flow, verification methodology and general computational logic design/verification concepts
- Excellent written and verbal communication skills
- Excellent interpersonal skills, self-motivated
- Prior experience to industry standard protocols such as AXI, AHB, PCIE, DDR etc. will be an advantage
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in computer engineering/Electrical Engineering
LOCATION: San Jose, CA
#LI-RL1
This role is not eligible for visa sponsorship.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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Find Design Verification JobsDesign Verification Job Market in San Jose
Who's Hiring
- Cisco19
- Micron Technology19
- Astera Labs14
- AMD10
- Etched10
Top Industries Hiring
- Electronics & Hardware
- Technology & Software
Design Verification Jobs in San Jose: Frequently Asked Questions
How do I get a design verification job in San Jose?
Target San Jose's dense semiconductor and EDA ecosystem directly, where the highest concentration of design verification roles sits in North San Jose's research parks and along the Great America Parkway corridor. Candidates who demonstrate hands-on experience with UVM, SystemVerilog, and formal verification tools stand out most in this market. Knowing a specific chip architecture or SoC domain, such as AI accelerators or networking silicon, sharpens your competitiveness significantly with local employers.
Which companies hire design verifications in San Jose?
Companies currently hiring design verifications in San Jose include Cisco, Micron Technology, and Astera Labs, per current listings on Migrate Mate as of August 2026. San Jose's employer mix skews heavily toward semiconductor IP firms, fabless chip companies, and large consumer electronics manufacturers with silicon design teams headquartered in the city.
Are there remote design verification jobs in San Jose?
Yes, though availability is limited since design verification often requires access to proprietary EDA tools, lab equipment, and secure chip design environments that most employers keep on-site. About 11% of design verification openings tied to San Jose are remote or hybrid as of August 2026, with remote work most common for pre-silicon simulation, testbench development, and formal verification tasks rather than lab-based or post-silicon validation work.
How can I get a design verification job in San Jose with little or no experience?
The most realistic entry path in San Jose is through a junior verification engineer or verification intern role at a mid-size fabless semiconductor company, which tends to have lower barriers than large incumbents. San Jose Community College and nearby San Jose State University feed local pipelines, so relevant coursework in digital design or VLSI combined with a personal UVM or SystemVerilog project on GitHub can substitute for formal work experience with many local hiring managers.
Which industries hire the most design verifications in San Jose?
Most design verification openings in San Jose sit in Electronics & Hardware and Technology & Software, per current listings on Migrate Mate as of August 2026. San Jose's role as the historical heart of Silicon Valley means semiconductor IP development, consumer electronics silicon, and networking hardware companies are all headquartered or heavily staffed locally, sustaining consistent verification demand across the market cycle.
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