Design Verification Jobs in Santa Clara, CA
Design Verification jobs in Santa Clara are in high demand, concentrated in the Central Expressway corridor, Bowers District, and the dense semiconductor campuses along Tasman Drive, across chip design, ASIC development, and embedded systems. Employers hiring right now include Marvell Technology, Apple, and NVIDIA. Find a role that fits below and apply directly.
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Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects and Link interface units. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, and a solid foundation in verification methodology is required.
Description
In this role you will:
- Develop verification plans in coordination with design leads and architects.
- Build and maintain portable verification test bench components and environments.
- Generate directed and constrained random tests.
- Run simulations and debug design and environment issues.
- Create functional coverage points, analyze coverage, and improve test environment to target coverage holes.
- Create automated verification flows for block verification.
- Apply knowledge of hardware description languages (VHDL/Verilog) to verify complex designs.
- Work with other block, memory subsystem and core level engineers to ensure seamless verification flow.
Minimum Qualifications
- Experience in CPU or GPU architecture.
- Experience developing unit or cluster level test environments.
- Experience with driving bring up and debug of complex designs.
- Experience with verification languages such as SystemVerilog.
- Experience with HDL simulators and waveform viewers.
- BS + minimum of 2 years of experience.
Preferred Qualifications
- Strong fundamental software and programming skills.
- Experience with cache verification and memory subsystem testing highly desired.
- Understanding of the Graphics Pipeline a plus.
- Experience defining and executing unit level test plans.
- Experience with common verification methodologies such as UVM.
- Experience defining coverage space, writing coverage and coverage closure.
- Experience with Perl, Ruby, Shell scripting, Makefiles.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 and $277,600, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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Find Design Verification JobsDesign Verification Job Market in Santa Clara
Who's Hiring
- Marvell Technology55

- Apple16

- NVIDIA16

- Intel Corporation16

- AMD8

Top Industries Hiring
- Electronics & Hardware39
- Technology & Software23
- Telecommunications4
- Agriculture & Farming4
- Artificial Intelligence4
Design Verification Jobs in Santa Clara: Frequently Asked Questions
How do I get a design verification job in Santa Clara?
Focus your search on Santa Clara's semiconductor and electronic design automation sectors, which generate the largest share of local openings. The Central Expressway corridor and Bowers District host the highest concentration of chip design and ASIC firms. Candidates who demonstrate proficiency with SystemVerilog, UVM, and formal verification tools stand out, and engineers who have contributed to pre-silicon validation projects at Silicon Valley companies get the strongest callbacks.
Which companies hire design verifications in Santa Clara?
Employers hiring design verifications in Santa Clara right now include Marvell Technology, Apple, and NVIDIA, based on current listings on Migrate Mate as of August 2026. Santa Clara's employer mix leans heavily toward semiconductor IP firms, fabless chip companies, and EDA tool vendors with deep verification engineering teams.
Are there remote design verification jobs in Santa Clara?
Yes, though with limits, since design verification often requires access to proprietary lab equipment, simulation servers, and tapeout infrastructure that stays on-site. About 60% of design verification openings tied to Santa Clara are remote or hybrid as of August 2026, with flexibility concentrated in functional coverage planning, testbench development, and post-silicon analysis rather than hands-on bring-up work.
How can I get a design verification job in Santa Clara with little or no experience?
The most realistic entry path is through an ASIC or SoC verification internship at one of Santa Clara's fabless semiconductor companies, which regularly hire students and new graduates into junior verification engineer roles. Contract-to-hire positions at local EDA firms and electronics manufacturers also open the door. Building a portfolio of UVM testbenches on open-source processor projects and pursuing any De Anza College or Santa Clara University coursework in digital design gives candidates a concrete local credential that hiring managers recognize.
Which industries hire the most design verifications in Santa Clara?
Most design verification openings in Santa Clara sit in Electronics & Hardware, Technology & Software, and Telecommunications, per current listings on Migrate Mate as of August 2026. Santa Clara's position at the center of Silicon Valley's chip ecosystem means those sectors drive consistent hiring pressure for verification engineers across every stage of the design cycle.
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