E-3 Visa Ic Design Engineer Jobs
IC design engineer roles qualify for E-3 visa sponsorship as specialty occupations requiring a bachelor's degree in electrical engineering or a closely related field. Australian engineers working on analog, digital, or mixed-signal IC design can secure two-year renewable status with no lottery and no annual cap.
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Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together.
The Company operates Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world, and Specs Inc., a wholly-owned subsidiary dedicated to making computing more human, in addition to Bitmoji, Saturn, and other digital services.
Specs Inc. is a wholly-owned subsidiary of Snap Inc. dedicated to making computing more human. The company develops Specs, advanced eyewear that seamlessly integrates digital experiences into the physical world.
Specs feature see-through lenses that place digital objects directly into three-dimensional space, powered by Snap OS, a proprietary, context-aware operating system designed for natural interaction with your hands and voice.
Specs Inc. also provides Lens Studio, a full suite of advanced developer tools that powers immersive augmented reality experiences across Specs, Snapchat, and other services.
We’re looking for a Custom IC Layout Engineer to join the MicroDisplay Electronics at SPECS.
ROLE AND RESPONSIBILITIES
What you’ll do:
- Work as part of a multi-disciplinary team designing display ICs for AR
- Work closely with digital and analog logic, circuit and physical design engineers & other custom layout engineers
- Perform cell and block layout of Analog and Mixed-Signal circuit functions, meeting design rules and performance
- Craft reusable scripts and methodologies that help automate design flow, repeatability and efficiency
- Implement circuit layout strategies for optimal area, performance and power goals
- Support IC floor planning and place & route of full chip digital designs with digital and analog IP
- Provides schedule, and cost inputs to program management
- Create and present design documentation for internal design reviews
- Execute parasitic extraction of circuit layout and iterate design improvements
BASIC QUALIFICATIONS
- BSEE or relevant years of experience
- 5+ years in directly applicable work performing custom layout
PREFERRED QUALIFICATIONS
- Detailed understanding of 22nm and below CMOS foundry design node rules and requirements
- Experience with both Analog and Memory layouts
- Excellent technical, documentation and verbal skills working with engineering and management teams
- Knowledge of ASIC IC test and characterization
- Understanding of digital design and place and route principles
"Default Together" Policy at Snap: At Snap Inc. we believe that being together in person helps us build our culture faster, reinforce our values, and serve our community, customers and partners better through dynamic collaboration. To reflect this, we practice a “default together” approach and expect our team members to work in an office 4+ days per week.
At Snap, we believe that having a team of diverse backgrounds and voices working together will enable us to create innovative products that improve the way people live and communicate. Snap is proud to be an equal opportunity employer, and committed to providing employment opportunities regardless of race, religious creed, color, national origin, ancestry, physical disability, mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, pregnancy, childbirth and breastfeeding, age, sexual orientation, military or veteran status, or any other protected classification, in accordance with applicable federal, state, and local laws. EOE, including disability/vets.
We are an Equal Opportunity Employer and will consider qualified applicants with criminal histories in a manner consistent with applicable law (by example, the requirements of the San Francisco Fair Chance Ordinance and the Los Angeles Fair Chance Initiative for Hiring, where applicable).
OUR BENEFITS
Snap Inc. is its own community, so we’ve got your back! We do our best to make sure you and your loved ones have everything you need to be happy and healthy, on your own terms. Our benefits are built around your needs and include paid parental leave, comprehensive medical coverage, emotional and mental health support programs, and compensation packages that let you share in Snap’s long-term success!
COMPENSATION
In the United States, work locations are assigned a pay zone which determines the salary range for the position. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions. The starting pay may be negotiable within the salary range for the position. These pay zones may be modified in the future.
Zone A (CA, WA, NYC):
The base salary range for this position is $173,000-$259,000 annually.
Zone B:
The base salary range for this position is $164,000-$246,000 annually.
Zone C:
The base salary range for this position is $147,000-$220,000 annually.
This position is eligible for equity in the form of RSUs.
If you believe this job description is missing required pay transparency information, please submit a report through this form: Job Description Pay Range Disclosure.
INTRODUCTION
Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together.
The Company operates Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world, and Specs Inc., a wholly-owned subsidiary dedicated to making computing more human, in addition to Bitmoji, Saturn, and other digital services.
Specs Inc. is a wholly-owned subsidiary of Snap Inc. dedicated to making computing more human. The company develops Specs, advanced eyewear that seamlessly integrates digital experiences into the physical world.
Specs feature see-through lenses that place digital objects directly into three-dimensional space, powered by Snap OS, a proprietary, context-aware operating system designed for natural interaction with your hands and voice.
Specs Inc. also provides Lens Studio, a full suite of advanced developer tools that powers immersive augmented reality experiences across Specs, Snapchat, and other services.
We’re looking for a Custom IC Layout Engineer to join the MicroDisplay Electronics at SPECS.
ROLE AND RESPONSIBILITIES
What you’ll do:
- Work as part of a multi-disciplinary team designing display ICs for AR
- Work closely with digital and analog logic, circuit and physical design engineers & other custom layout engineers
- Perform cell and block layout of Analog and Mixed-Signal circuit functions, meeting design rules and performance
- Craft reusable scripts and methodologies that help automate design flow, repeatability and efficiency
- Implement circuit layout strategies for optimal area, performance and power goals
- Support IC floor planning and place & route of full chip digital designs with digital and analog IP
- Provides schedule, and cost inputs to program management
- Create and present design documentation for internal design reviews
- Execute parasitic extraction of circuit layout and iterate design improvements
BASIC QUALIFICATIONS
- BSEE or relevant years of experience
- 5+ years in directly applicable work performing custom layout
PREFERRED QUALIFICATIONS
- Detailed understanding of 22nm and below CMOS foundry design node rules and requirements
- Experience with both Analog and Memory layouts
- Excellent technical, documentation and verbal skills working with engineering and management teams
- Knowledge of ASIC IC test and characterization
- Understanding of digital design and place and route principles
"Default Together" Policy at Snap: At Snap Inc. we believe that being together in person helps us build our culture faster, reinforce our values, and serve our community, customers and partners better through dynamic collaboration. To reflect this, we practice a “default together” approach and expect our team members to work in an office 4+ days per week.
At Snap, we believe that having a team of diverse backgrounds and voices working together will enable us to create innovative products that improve the way people live and communicate. Snap is proud to be an equal opportunity employer, and committed to providing employment opportunities regardless of race, religious creed, color, national origin, ancestry, physical disability, mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, pregnancy, childbirth and breastfeeding, age, sexual orientation, military or veteran status, or any other protected classification, in accordance with applicable federal, state, and local laws. EOE, including disability/vets.
We are an Equal Opportunity Employer and will consider qualified applicants with criminal histories in a manner consistent with applicable law (by example, the requirements of the San Francisco Fair Chance Ordinance and the Los Angeles Fair Chance Initiative for Hiring, where applicable).
OUR BENEFITS
Snap Inc. is its own community, so we’ve got your back! We do our best to make sure you and your loved ones have everything you need to be happy and healthy, on your own terms. Our benefits are built around your needs and include paid parental leave, comprehensive medical coverage, emotional and mental health support programs, and compensation packages that let you share in Snap’s long-term success!
COMPENSATION
In the United States, work locations are assigned a pay zone which determines the salary range for the position. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions. The starting pay may be negotiable within the salary range for the position. These pay zones may be modified in the future.
Zone A (CA, WA, NYC):
The base salary range for this position is $173,000-$259,000 annually.
Zone B:
The base salary range for this position is $164,000-$246,000 annually.
Zone C:
The base salary range for this position is $147,000-$220,000 annually.
This position is eligible for equity in the form of RSUs.
If you believe this job description is missing required pay transparency information, please submit a report through this form: Job Description Pay Range Disclosure.
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Get Access To All JobsTips for Finding E-3 Visa Sponsorship as an Ic Design Engineer
Align your degree to the role
U.S. consular officers scrutinize whether your Australian engineering degree matches the IC design role specifically. A bachelor's in electrical or computer engineering supports the specialty occupation requirement; a general engineering degree may require additional documentation linking your coursework to semiconductor or VLSI design.
Target semiconductor companies with LCA history
Search the DOL's Labor Condition Application disclosure data to identify employers who have filed LCAs for IC design or related semiconductor engineering titles. Repeated LCA filings signal an employer who understands the E-3 visa process and won't need educating at the offer stage.
Use Migrate Mate to find sponsoring employers
Migrate Mate filters IC design engineer roles by E-3 visa sponsorship availability, so you're not cold-applying to employers unfamiliar with Australian-only visa categories. Use Migrate Mate's E-3 filing service to handle your LCA and visa paperwork once you have an offer.
Clarify the LCA wage level before accepting
Your employer files an LCA certifying your wage meets the prevailing wage for IC design in that location. Ask to confirm the wage level before signing your offer letter, as Level I or II classifications can fall below what you'd expect for a mid-career semiconductor engineer.
Prepare a portfolio tied to VLSI or chip tape-outs
E-3 specialty occupation denials in engineering often stem from ambiguity about whether the role genuinely requires a specific degree. A portfolio documenting tape-out projects, EDA tool proficiency, and design rule check sign-offs strengthens the employer's position during the LCA and consular application.
Book your consulate appointment early after LCA certification
Once your employer's LCA is certified by the DOL, schedule your Australian consulate appointment promptly. Sydney, Melbourne, and Perth all process E-3 applications, but appointment availability varies by location and season, and delays can push back your U.S. start date by several weeks.
E-3 Visa Ic Design Engineer: Frequently Asked Questions
How do I find IC design engineer jobs with E-3 sponsorship?
Migrate Mate is the most direct way to search IC design engineer roles where employers are already open to E-3 sponsorship. Most general job boards don't filter by visa category, so you can spend weeks applying to roles where the employer has never encountered the E-3. Migrate Mate surfaces positions matched to Australian professionals specifically, saving you that back-and-forth.
How much does it cost to get an E-3 visa?
Migrate Mate's E-3 filing service covers the entire process for $499, including the Labor Condition Application, visa document preparation, and consulate appointment guidance. Traditional immigration lawyers charge $2,000–$5,000+ for the same work. The E-3 has less paperwork than most work visas, so paying thousands for legal help is usually unnecessary.
Does IC design engineering qualify as a specialty occupation for the E-3?
Yes. IC design engineering requires a bachelor's degree or higher in electrical engineering, computer engineering, or a closely related discipline, which meets the USCIS specialty occupation definition. Roles involving analog circuit design, RTL coding, physical design, or mixed-signal verification consistently satisfy the requirement. A general engineering degree without coursework relevant to semiconductor design can create complications at the consulate, so documentation matters.
How does the E-3 visa compare to the H-1B for IC design engineers?
The E-3 is available exclusively to Australian citizens and has no lottery, no annual cap, and no waiting period tied to fiscal year registration. The H-1B visa has an 85,000-slot annual cap with a randomized lottery, meaning qualified IC design engineers are often not selected despite strong credentials. For Australians, the E-3 is a direct path that can be filed any time of year with an employer LCA.
Can I change IC design employers while on an E-3 visa?
Yes, but your new employer must file a fresh LCA before you start work with them. The E-3 is employer-specific, so you can't simply transfer status the way some other visa categories allow. You'll typically need to attend a new consulate appointment in Australia unless you pursue a change of status through USCIS while already in the U.S., which adds processing time.