RTL Design Engineer Jobs in California
RTL Design Engineer jobs in California are concentrated in semiconductor design, consumer electronics, and data center silicon development, with the state representing one of the most active markets in the world for this discipline. The heaviest hiring is in Silicon Valley, San Diego, and the greater Los Angeles area, where established companies like Qualcomm, Apple, and Intel have deep engineering footprints. High-frequency digital design, verification methodologies such as UVM, and low-power architecture are the sub-areas driving the most consistent demand, from entry-level RTL positions through principal and staff-level roles. Scan the live roles below and apply to whichever ones fit.
Find RTL Design Engineer JobsOverview
Showing 5 of 29+ RTL Design Engineer jobs
Minimum qualifications:
- Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
- 8 years of experience with SystemVerilog, hardware design, automation, design verification test.
- 5 years of experience working with Computer-aided design (CAD).
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.
- Experience planning, coding, and deploying new tools and flows to users.
- Knowledge of the chip design process and methodology for RTL quality.
- Ability to present and explain novel methods to users.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Senior Engineer within Google's silicon team, you will help deliver products that have a substantive impact on the technical infrastructure that powers Google. You will provide leadership to a group of engineers in an innovative and changing environment with a focus on infrastructure for chip design. You will also lead technical projects from the concept/planning stage through execution and delivery.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Lead CAD methodology engineers to provide enablement and support for RTL Design teams.
- Partner with chip project teams to influence and standardize design methodology across projects.
- Perform or guide technical evaluations of tools for possible deployment.
- Collaborate with teams across Google to identify and create strategic opportunities for improved chip design across Google.
- Participate in design reviews and track issue resolution and engage in technical and schedule trade-off discussions.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
- 8 years of experience with SystemVerilog, hardware design, automation, design verification test.
- 5 years of experience working with Computer-aided design (CAD).
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.
- Experience planning, coding, and deploying new tools and flows to users.
- Knowledge of the chip design process and methodology for RTL quality.
- Ability to present and explain novel methods to users.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Senior Engineer within Google's silicon team, you will help deliver products that have a substantive impact on the technical infrastructure that powers Google. You will provide leadership to a group of engineers in an innovative and changing environment with a focus on infrastructure for chip design. You will also lead technical projects from the concept/planning stage through execution and delivery.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Lead CAD methodology engineers to provide enablement and support for RTL Design teams.
- Partner with chip project teams to influence and standardize design methodology across projects.
- Perform or guide technical evaluations of tools for possible deployment.
- Collaborate with teams across Google to identify and create strategic opportunities for improved chip design across Google.
- Participate in design reviews and track issue resolution and engage in technical and schedule trade-off discussions.
See All 29 RTL Design Engineer Jobs in California
Find roles in California that match your experience and apply in just a few clicks.
Find RTL Design Engineer JobsRTL Design Engineer Jobs by City in California
Where California roles are concentrated, by current openings.
RTL Design Engineer Job Market in California
A snapshot from current California openings, updated as new roles post.
Who's Hiring
Top Industries Hiring
- Electronics & Hardware10
- Technology & Software2
- Retail1
- Manufacturing1
- E-Commerce & Online Marketplaces1
What California Employers Look For
The qualifications that appear most often in RTL design engineer jobs across California.
- Bachelor's or master's degree in electrical engineering or computer engineering required
- Proficiency in Verilog or SystemVerilog for RTL coding and verification
- Experience with synthesis, timing closure, and static timing analysis tools
- Familiarity with UVM or similar constrained-random verification methodologies
- Background in low-power design techniques such as clock gating and power domains
- Exposure to ASIC or SoC design flows from specification through tape-out
RTL Design Engineer Jobs in California: Frequently Asked Questions
How do you become a rtl design engineer in California?
Most rtl design engineers in California enter the field with a bachelor's degree in electrical engineering or computer engineering, and many roles at mid-to-senior level expect a master's degree. California does not require a state-issued license to practice RTL design, so the path centers on academic credentials and demonstrated tool proficiency. Building a portfolio through capstone projects, open-source chip design contributions, or internships at California semiconductor firms gives candidates a strong competitive edge.
Which companies hire rtl design engineers in California?
California rtl design engineer roles are posted by Apple, Google, and SiFive and others right now, based on current listings on Migrate Mate as of August 2026. California's dense concentration of semiconductor headquarters and fabless chip companies means hiring activity is spread across Silicon Valley, San Diego, and Los Angeles rather than anchored to a single employer.
Which California cities have the most rtl design engineer jobs?
Sunnyvale, Irvine, and San Jose account for the largest share of rtl design engineer openings in California. Silicon Valley dominates because of the density of fabless semiconductor companies and major tech hardware divisions headquartered there, while San Diego's strength in mobile and wireless chip design and the Los Angeles area's growing data center silicon activity drive demand in those metros.
Are there remote rtl design engineer jobs in California?
Yes, but they're less common than in purely software-focused disciplines because RTL design work often involves access to licensed EDA tools, proprietary simulation environments, and lab hardware tied to a specific office. About 29% of rtl design engineer openings tied to California are remote or hybrid as of August 2026, with remote arrangements most frequently offered for verification-heavy or architecture-planning portions of the role rather than hands-on physical design.
How can I get hired as a rtl design engineer in California with little or no experience?
The most realistic entry path is through a formal internship or new-graduate program at a California semiconductor company, where firms like Qualcomm, Broadcom, and Apple run structured rotations specifically for candidates without professional RTL experience. Adjacent roles such as FPGA design engineer, embedded firmware engineer, or digital verification engineer are common lateral entry points at California employers. A completed chip design project, even a small open-source RISC-V core, signals practical readiness and is weighted heavily in California hiring at the entry level.
Where can I find and apply to rtl design engineer jobs in California?
You can find and apply to rtl design engineer jobs in California on Migrate Mate, which lists current California openings across semiconductor, consumer electronics, and data center silicon employers. Search the listings to identify roles that match your experience level and specialization, then apply directly to the ones that fit.
See All 29 RTL Design Engineer Jobs in California
Find roles in California that match your experience and apply in just a few clicks.
Find RTL Design Engineer Jobs