STEM OPT Circuit Design Engineer Jobs
Circuit Design Engineer roles in semiconductors, RF systems, and embedded hardware fall squarely within STEM OPT eligibility. Your STEM degree lets you apply for a 24-month OPT extension, giving you up to 36 months of work authorization, as long as your employer is enrolled in E-Verify before your training plan is filed.
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Job Description:
About Intel: At Intel, we strive to create innovative technologies that shape the future of computing and empower every person and organization on the planet. This position offers a unique opportunity to innovate and impact Intel's Data Center and AI product lines, ensuring high-quality and efficient designs that drive meaningful change in the technology landscape.
Position Overview: As an Analog Circuit Design Engineer, you will play a pivotal role in designing, developing, and optimizing cutting-edge analog and mixed-signal circuits that power Intel's advanced process nodes. You will collaborate with cross-disciplinary teams to bring high-performance, low-power solutions to life, contributing to Intel's success in delivering world-class products.
Key Responsibilities:
- Design and develop complex analog and mixed-signal circuits, including transmitters (TX), receivers (RX), amplifiers, filters, clocking systems, and on-die voltage regulators
- Perform circuit analysis and tradeoffs to optimize power, performance, area, timing, and yield
- Create and validate behavioral models for analog and mixed-signal IPs for system-level integration
- Develop and oversee floorplans and layouts while ensuring adherence to design rules and robustness
- Conduct small signal analysis, stability testing, and compensation of feedback loops to meet performance specifications
- Collaborate with architecture, layout, and validation teams to ensure seamless integration of designs into products
- Author microarchitecture specifications, test plans, and documentation for design verification and validation
- Conduct post-silicon validation and debug to ensure design functionality and performance meet product requirements
- Provide technical mentorship and contribute to design reviews to enhance team-wide engineering excellence
- Leverage industry-standard tools and methodologies, such as Synopsys and Cadence, for design and simulation
You should demonstrate the following professional traits to be successful:
- Effective collaborator who works well across cross-disciplinary teams including architecture, layout, and validation
- Strong problem-solver with a system-level mindset and the ability to navigate complex technical tradeoffs
- Committed to engineering excellence through mentorship, thorough documentation, and active participation in design reviews
Qualifications
Minimum Qualifications
- Bachelor's degree in Electrical Engineering or Computer Engineering with 3+ years of experience, or Master's degree in Electrical Engineering or Computer Engineering with 2+ years of experience, or a PhD in Electrical Engineering or Computer Engineering
The years of experience must include the following:
- VLSI analog circuit design, small-signal analysis, and understanding of foundational digital design concepts
- Synopsys and Cadence design tools and flows
- Design optimization techniques related to performance, power, and area
Preferred Qualifications
- Knowledge of high-speed IO signaling, transmission line theory, and power delivery concepts
- Familiarity with PLLs, ADCs, DACs, switched-capacitor circuits, and noise analysis methodologies
- Experience with scripting, Matlab, and post-silicon characterization using lab tools such as oscilloscopes and signal generators
- Cross-disciplinary knowledge in analog integration, RTL, static timing analysis, and power grid design
- Proven track record of system-level understanding, problem-solving, and effective collaboration in a team setting
- VS Code, Python, and GitHub Copilot
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Santa Clara
Additional Locations:
US, California, Folsom
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Job Details:
Job Description:
About Intel: At Intel, we strive to create innovative technologies that shape the future of computing and empower every person and organization on the planet. This position offers a unique opportunity to innovate and impact Intel's Data Center and AI product lines, ensuring high-quality and efficient designs that drive meaningful change in the technology landscape.
Position Overview: As an Analog Circuit Design Engineer, you will play a pivotal role in designing, developing, and optimizing cutting-edge analog and mixed-signal circuits that power Intel's advanced process nodes. You will collaborate with cross-disciplinary teams to bring high-performance, low-power solutions to life, contributing to Intel's success in delivering world-class products.
Key Responsibilities:
- Design and develop complex analog and mixed-signal circuits, including transmitters (TX), receivers (RX), amplifiers, filters, clocking systems, and on-die voltage regulators
- Perform circuit analysis and tradeoffs to optimize power, performance, area, timing, and yield
- Create and validate behavioral models for analog and mixed-signal IPs for system-level integration
- Develop and oversee floorplans and layouts while ensuring adherence to design rules and robustness
- Conduct small signal analysis, stability testing, and compensation of feedback loops to meet performance specifications
- Collaborate with architecture, layout, and validation teams to ensure seamless integration of designs into products
- Author microarchitecture specifications, test plans, and documentation for design verification and validation
- Conduct post-silicon validation and debug to ensure design functionality and performance meet product requirements
- Provide technical mentorship and contribute to design reviews to enhance team-wide engineering excellence
- Leverage industry-standard tools and methodologies, such as Synopsys and Cadence, for design and simulation
You should demonstrate the following professional traits to be successful:
- Effective collaborator who works well across cross-disciplinary teams including architecture, layout, and validation
- Strong problem-solver with a system-level mindset and the ability to navigate complex technical tradeoffs
- Committed to engineering excellence through mentorship, thorough documentation, and active participation in design reviews
Qualifications
Minimum Qualifications
- Bachelor's degree in Electrical Engineering or Computer Engineering with 3+ years of experience, or Master's degree in Electrical Engineering or Computer Engineering with 2+ years of experience, or a PhD in Electrical Engineering or Computer Engineering
The years of experience must include the following:
- VLSI analog circuit design, small-signal analysis, and understanding of foundational digital design concepts
- Synopsys and Cadence design tools and flows
- Design optimization techniques related to performance, power, and area
Preferred Qualifications
- Knowledge of high-speed IO signaling, transmission line theory, and power delivery concepts
- Familiarity with PLLs, ADCs, DACs, switched-capacitor circuits, and noise analysis methodologies
- Experience with scripting, Matlab, and post-silicon characterization using lab tools such as oscilloscopes and signal generators
- Cross-disciplinary knowledge in analog integration, RTL, static timing analysis, and power grid design
- Proven track record of system-level understanding, problem-solving, and effective collaboration in a team setting
- VS Code, Python, and GitHub Copilot
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Santa Clara
Additional Locations:
US, California, Folsom
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
See all STEM OPT Circuit Design Engineer Jobs
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Get Access To All JobsTips for Finding STEM OPT Authorization as a Circuit Design Engineer
Verify your CIP code matches circuit engineering
Your STEM OPT eligibility depends on your degree's Classification of Instructional Programs code. Electrical Engineering (14.1001) and Computer Engineering (14.0901) both qualify, but confirm your specific code with your DSO before applying to roles.
Check E-Verify enrollment before accepting offers
Your employer must be enrolled in E-Verify before you submit your I-983 training plan. Search the E-Verify employer search tool by company name to confirm enrollment status. An unenrolled employer cannot legally authorize your STEM OPT extension.
Build a portfolio of tape-out or simulation projects
Circuit Design Engineer roles require demonstrated proficiency in tools like Cadence, Synopsys, or SPICE. Hiring managers at semiconductor firms often filter candidates by tape-out experience. Document any academic or internship designs you contributed to before applying.
Target fabless and EDA companies with OPT hiring history
Use Migrate Mate to filter Circuit Design Engineer roles by employers who have filed Labor Condition Applications for STEM roles. DOL LCA data shows which companies actively hire STEM OPT students into hardware and design positions.
Structure your I-983 around specific design deliverables
Your I-983 training plan must list concrete learning objectives tied to your Circuit Design Engineer role. Vague descriptions get rejected by DSOs. Specify milestones like schematic design reviews, layout sign-offs, or silicon bring-up participation with projected completion dates.
Benchmark your offer against OFLC Wage Search data
Before signing an offer, look up your job title and work location in the OFLC Wage Search to confirm the salary meets the prevailing wage for that metro area. Underpaid STEM OPT positions can create problems if the employer later files an H-1B visa petition on your behalf.
Frequently Asked Questions
Does a Circuit Design Engineer role qualify for the STEM OPT extension?
Yes, if your degree is in an eligible STEM field. Electrical Engineering, Computer Engineering, and Computer Science degrees all carry qualifying CIP codes. The role itself must also relate directly to your degree field. Your DSO reviews both the job description and your degree when approving your I-983 training plan, so confirm the connection is explicit before they submit.
How do I confirm my employer is enrolled in E-Verify before starting?
Use the E-Verify employer search tool to look up your employer by company name or employer identification number. Enrollment must be active before you submit your I-983 training plan to your DSO. If your employer is not yet enrolled, they can register directly through E-Verify, but that process takes time, so raise it early in the offer negotiation stage.
What should my I-983 training plan include for a Circuit Design Engineer position?
Your I-983 must describe how the role connects to your STEM degree with specific, measurable learning goals. For circuit design roles, list objectives like mastering a particular EDA toolchain, completing a design review cycle, or contributing to a tape-out milestone. Generic descriptions like 'gain industry experience' are not sufficient and will delay DSO approval.
What happens to my work authorization if my H-1B is selected in the lottery while on STEM OPT?
If your employer files an H-1B petition on your behalf and it is selected in the lottery, cap-gap protection extends your STEM OPT work authorization through September 30 of that fiscal year. USCIS issues cap-gap coverage automatically if your OPT EAD is still valid when the petition is filed. You can continue working as a Circuit Design Engineer during this period without interruption.
Where can I find Circuit Design Engineer jobs where employers are already familiar with STEM OPT?
Migrate Mate lists Circuit Design Engineer roles filtered by employers with active DOL Labor Condition Application filings, which shows they have experience hiring international candidates in STEM roles. Targeting these employers reduces the time you spend educating hiring managers about E-Verify enrollment and I-983 requirements, which are non-negotiable parts of your extension approval.