STEM OPT Design Verification Jobs
Design Verification roles in semiconductors, embedded systems, and hardware engineering are a strong fit for STEM OPT students with degrees in electrical engineering, computer engineering, or computer science. Your 24-month STEM OPT extension applies here, and every employer you work for must be enrolled in E-Verify.
Find STEM OPT Design Verification JobsOverview
Showing 5 of 40+ Design Verification jobs
Have you applied for this role?
Have you applied for this role?
Have you applied for this role?
Have you applied for this role?
Have you applied for this role?
See all 40+ Design Verification Jobs
Sign up for free to unlock all listings, filter by visa type, and get alerts for new Design Verification roles.
Get Access To All JobsJob Details:
Job Description:
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
Responsibilities:
- Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
- Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
- Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
- Replicates, root causes, and debugs issues in the presilicon environment.
- Finds and implements corrective measures to resolve failing tests.
- Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
- Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
- Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.
- Maintains and improves existing functional verification infrastructure and methodology.
- Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
Minimum Qualifications:
The candidate must be a graduate with a Bachelors or Masters Degree in Electrical Engineering and/or Computer Engineering and/or Computer Science
Core Skills:
- 1+ years SystemVerilog and UVM experience
- 2+ years Python for test automation
- 6+ months C/C++ and scripting proficiency (Perl, Tcl, Shell)
Environment & Process:
- 1+ years pre-silicon verification experience
- 6+ months Linux/Unix and version control (Git, Perforce)
- 6+ months Regression testing and CI/CD pipelines
- 6+ months Security verification methodologies
Preferred Qualifications:
Tools & Verification:
- Experience with simulation tools (VCS, Xcelium, Questa)
- Formal verification tools and coverage analysis
- Constrained random and assertion-based verification
Hardware Knowledge:
- Experience x86 SoC or equivalent architectures
- AMBA protocols (AXI, AHB, APB) and interconnects
- Memory subsystems, cache coherency, power management
- High-speed interfaces (PCIe, DDR, USB, Ethernet)
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Colorado, Fort Collins
Additional Locations:
Business group:
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-172,860.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. The application window for this job posting is expected to end by 05/25/2026.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Job Details:
Job Description:
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
Responsibilities:
- Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
- Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
- Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
- Replicates, root causes, and debugs issues in the presilicon environment.
- Finds and implements corrective measures to resolve failing tests.
- Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
- Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
- Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.
- Maintains and improves existing functional verification infrastructure and methodology.
- Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
Minimum Qualifications:
The candidate must be a graduate with a Bachelors or Masters Degree in Electrical Engineering and/or Computer Engineering and/or Computer Science
Core Skills:
- 1+ years SystemVerilog and UVM experience
- 2+ years Python for test automation
- 6+ months C/C++ and scripting proficiency (Perl, Tcl, Shell)
Environment & Process:
- 1+ years pre-silicon verification experience
- 6+ months Linux/Unix and version control (Git, Perforce)
- 6+ months Regression testing and CI/CD pipelines
- 6+ months Security verification methodologies
Preferred Qualifications:
Tools & Verification:
- Experience with simulation tools (VCS, Xcelium, Questa)
- Formal verification tools and coverage analysis
- Constrained random and assertion-based verification
Hardware Knowledge:
- Experience x86 SoC or equivalent architectures
- AMBA protocols (AXI, AHB, APB) and interconnects
- Memory subsystems, cache coherency, power management
- High-speed interfaces (PCIe, DDR, USB, Ethernet)
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Colorado, Fort Collins
Additional Locations:
Business group:
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-172,860.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. The application window for this job posting is expected to end by 05/25/2026.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
See all 40+ STEM OPT Design Verification Jobs
Sign up for free to unlock all listings, filter by visa type, and get alerts for new STEM OPT Design Verification Jobs.
Get Access To All JobsTips for Finding STEM OPT Authorization in Design Verification
Confirm your CIP code covers verification roles
Check that your degree's Classification of Instructional Programs code maps to an approved STEM field before applying. Electrical Engineering (14.1001) and Computer Engineering (14.0901) both qualify, but a mismatch delays your extension.
Search employers through E-Verify before applying
Use the E-Verify employer search to confirm a company is enrolled before you invest time in their process. Design Verification roles often sit inside hardware or silicon teams at companies that don't always advertise their E-Verify status publicly.
Build your I-983 training plan around functional verification
Your I-983 must list specific learning objectives tied to your role. For Design Verification, name concrete skills: writing UVM testbenches, coverage closure, formal property verification, or RTL debugging, not vague goals like 'gain industry experience.'
Target companies with active USCIS LCA filings in EE roles
Migrate Mate surfaces employers with verified Labor Condition Application filing history in electrical and computer engineering occupations, so you can focus your search on companies already set up to hire STEM OPT candidates in technical hardware roles.
Request an offer letter that specifies your direct supervisor
USCIS requires a bona fide employer-employee relationship for STEM OPT. Your offer letter should name your direct reporting manager and describe hands-on training, not just a job title, to support your DSO's I-983 sign-off without delays.
Apply 90 days before your OPT end date to avoid a gap
Your DSO must recommend the STEM OPT extension in SEVIS before your initial OPT expires. Filing your I-765 at least 90 days out keeps you in a valid cap-gap period if USCIS processing extends past your OPT end date.
Frequently Asked Questions
Does a Design Verification role qualify for the STEM OPT extension?
Yes, if your employer is enrolled in E-Verify and your degree is in an approved STEM field such as Electrical Engineering, Computer Engineering, or Computer Science. The O*NET occupation profile for Design Verification engineers confirms the role's alignment with STEM disciplines. Your DSO verifies the CIP code match before recommending the extension in SEVIS.
What should my I-983 training plan include for a Design Verification job?
Your I-983 must document specific learning goals tied to your actual work. For Design Verification, that means naming technical skills you'll develop, such as UVM methodology, SystemVerilog assertions, simulation debugging, or coverage-driven verification. Generic objectives like 'improve engineering skills' won't satisfy USCIS. Your employer's designated training supervisor must sign the form and provide mid-point and final evaluations.
How do I confirm my employer is enrolled in E-Verify before accepting an offer?
E-Verify maintains a public employer search tool where you can look up a company by name or location. Enrollment is required for all STEM OPT employers, so confirm this before signing an offer letter. Semiconductor and hardware design firms with federal contracts are typically already enrolled, but smaller IP or EDA startups may not be, so always verify directly.
Can I work for multiple employers on STEM OPT in a Design Verification role?
Yes, but each employer must be separately enrolled in E-Verify, and you need a separate I-983 training plan for each one. Your DSO must be notified of every employer relationship. A part-time verification contract role at a second company counts as concurrent employment and requires its own documentation. USCIS expects all training to be directly related to your qualifying STEM degree.
Where can I find Design Verification jobs where employers are already set up for STEM OPT?
Migrate Mate filters Design Verification roles by employers with active E-Verify enrollment and LCA filing history in engineering occupations, so you're not applying blind to companies that have never hired on STEM OPT before. This saves the back-and-forth of asking HR whether they can take on a STEM OPT student for a hardware verification position.