Mid Level Verification Engineer Jobs
Mid level verification engineer jobs go to engineers ready to own verification plans end to end, drive coverage decisions with minimal oversight, and mentor junior teammates through complex debug cycles. Openings are spread across on-site, hybrid, and remote settings in Technology & Software, Electronics & Hardware, and Consulting & Professional Services, with NVIDIA, Apple, and EY hiring at this level now.
Find JobsOverview
Showing 5 of 40+ Mid Level Verification Engineer jobs
SUMMARY
Did you know that Apple is hiring analog & mixed signal verification engineers? We are looking for engineers that are enthusiastic to find bugs! You have the opportunity to work with a creative team to craft test plans and enable production-quality first silicon. As a member of the analog and mixed signal verification team, you will be working with specialists for full-chip verification of the state of the art mixed-signal systems used in Apple’s world-leading products!
DESCRIPTION
In this role, you will be responsible for ensuring high quality silicon for IC chips and IPs. Daily work involves verification of mixed signal IC designs using a combination of analog circuits and RTL in the same simulation. Responsibilities include all phases of pre-silicon verification from early discussions with architects, reviewing specifications, writing verification plans, running simulations, triaging issues, and reviewing results with the team.
- Develop detailed test and coverage plans based on IC specifications.
- Completion of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out.
- Develop verification methodology suitable for the IP, ensuring scalability and portability.
- Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage.
- Sign-off mixed signal designs in preparation for tapeout.
MINIMUM QUALIFICATIONS
- BS and a minimum of 3 years of relevant industry experience.
PREFERRED QUALIFICATIONS
- Ability to verify analog/mixed-signal designs in a collaborative team environment.
- Proficient in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
- Familiarity with authoring analog assertion checks to catch bugs.
- Capability to identify failure mechanisms and review verification results in analog IC designs.
- Ability to write test plans, present results, and communicate clearly with multi-functional teams.
- Comfortable with running simulations through compute clusters while optimizing simulation and wall time.
- Understanding of both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, bandgaps, data converters, and/or clock generators.
- Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, gate level simulations.
- Experience developing scalable and portable test benches.
- A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.
- Your familiarity with analog behavioral models is also a plus.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Apple accepts applications to this posting on an ongoing basis.
SUMMARY
Did you know that Apple is hiring analog & mixed signal verification engineers? We are looking for engineers that are enthusiastic to find bugs! You have the opportunity to work with a creative team to craft test plans and enable production-quality first silicon. As a member of the analog and mixed signal verification team, you will be working with specialists for full-chip verification of the state of the art mixed-signal systems used in Apple’s world-leading products!
DESCRIPTION
In this role, you will be responsible for ensuring high quality silicon for IC chips and IPs. Daily work involves verification of mixed signal IC designs using a combination of analog circuits and RTL in the same simulation. Responsibilities include all phases of pre-silicon verification from early discussions with architects, reviewing specifications, writing verification plans, running simulations, triaging issues, and reviewing results with the team.
- Develop detailed test and coverage plans based on IC specifications.
- Completion of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out.
- Develop verification methodology suitable for the IP, ensuring scalability and portability.
- Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage.
- Sign-off mixed signal designs in preparation for tapeout.
MINIMUM QUALIFICATIONS
- BS and a minimum of 3 years of relevant industry experience.
PREFERRED QUALIFICATIONS
- Ability to verify analog/mixed-signal designs in a collaborative team environment.
- Proficient in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
- Familiarity with authoring analog assertion checks to catch bugs.
- Capability to identify failure mechanisms and review verification results in analog IC designs.
- Ability to write test plans, present results, and communicate clearly with multi-functional teams.
- Comfortable with running simulations through compute clusters while optimizing simulation and wall time.
- Understanding of both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, bandgaps, data converters, and/or clock generators.
- Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, gate level simulations.
- Experience developing scalable and portable test benches.
- A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.
- Your familiarity with analog behavioral models is also a plus.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Apple accepts applications to this posting on an ongoing basis.
See All 40 Mid Level Verification Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
Find JobsMid Level Verification Engineer Job Market
Who's Hiring
Top Industries Hiring
- Technology & Software15
- Electronics & Hardware12
- Consulting & Professional Services7
- Manufacturing2
- Telecommunications2
Mid Level Verification Engineer Jobs: Frequently Asked Questions
How do I get a mid level verification engineer job?
Position your application around ownership, not task completion. Highlight verification environments you built or expanded, coverage closure you drove, and bugs you caught before tape-out. Interviewers at this level want to see that you can take a block or subsystem from specification to sign-off without constant direction. Tailor your resume to the methodology the team uses, whether that is UVM, formal, or mixed-signal, and make your measurable impact clear.
Which companies hire mid level verification engineers?
Companies hiring mid level verification engineers right now include NVIDIA, Apple, and EY, based on current listings on Migrate Mate as of November 2026. Hiring at this level comes from semiconductor and IP design firms, systems companies building custom silicon, and defense and aerospace organizations running complex hardware programs.
Are there remote mid level verification engineer jobs?
Yes, though availability varies by team and project sensitivity. About 21% of mid level verification engineer openings are remote or hybrid as of November 2026, with hybrid arrangements most common at companies whose lab infrastructure requires occasional on-site access. Fully remote roles tend to appear at companies with distributed verification teams working on IP or software-driven projects.
How do I move up to a mid level verification engineer role?
Growth from entry level to mid level comes from deepening your ownership over time. Start by mastering your team's language and methodology, then actively seek out subsystems you can own from testbench bring-up through coverage sign-off. Document your impact, ask to lead debug sessions, and volunteer to onboard newer engineers. Demonstrating that you operate with less supervision and produce measurable quality improvements is what signals readiness for mid level work.
Which industries hire the most mid level verification engineers?
Mid Level verification engineer roles concentrate in Technology & Software, Electronics & Hardware, and Consulting & Professional Services, based on current listings on Migrate Mate as of November 2026. These sectors drive the highest demand because they are producing increasingly complex custom silicon, FPGAs, and mixed-signal designs that require structured, scalable verification at every stage of the development cycle.