Verification Engineer Jobs in USA with Visa Sponsorship
Verification engineers are strong H-1B visa candidates, the role qualifies as a specialty occupation requiring a bachelor's degree in electrical engineering, computer engineering, or a related field. Most openings come from semiconductor, defense, and hardware companies with established sponsorship pipelines. For detailed occupation requirements, see the O*NET profile.
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WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
The Infinity Fabric transport layer verification team is looking for a senior pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Define and drive verification strategy for complex GPU features or subsystems with cross-project and cross-product impact
- Partner with architects, RTL, and firmware leads to influence feature definition, implementation approach, and verification readiness early in the design cycle
- Own verification planning and execution for technically critical areas, including risk identification, trade-off analysis, and mitigation strategies
- Lead development of robust, scalable verification environments and methodologies, including directed and constrained-random testing using SystemVerilog and UVM
- Solve complex, ambiguous verification challenges, often requiring new approaches or extensions to existing processes and infrastructure
- Analyze functional and code coverage at a system level, driving coverage closure strategies that balance quality, schedule, and compute efficiency
- Drive improvements to verification processes, tools, and workflows that increase productivity, quality, or execution efficiency across teams
- Coordinate and technically lead small verification efforts within larger programs, aligning stakeholders and delivering on shared objectives
- Mentor and coach junior and senior engineers, acting as a go-to technical resource and influencing best practices across the organization
PREFERRED EXPERIENCE:
- Proficient in IP level ASIC verification
- Proficient in debugging firmware and RTL code using simulation tools
- Proficient in using UVM testbenches and working in Linux and Windows environments
- Experienced with Verilog, System Verilog, C, and C++
- Developing UVM based verification frameworks and testbenches, processes and flows
- Automating workflows in a distributed compute environment
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
- Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
- Good working knowledge of SystemC and TLM with some related experience
- Scripting language experience: Perl, Ruby, Makefile, shell preferred
- Experience working with complex designs (not just I2C and other similar designs)
ACADEMIC CREDENTIALS:
BS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science preferred.
LOCATION: Santa Clara, CA
LI-MF2
LI-HYBRID
QUALIFICATIONS
Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.
Overview:
WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
The Infinity Fabric transport layer verification team is looking for a senior pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Define and drive verification strategy for complex GPU features or subsystems with cross-project and cross-product impact
- Partner with architects, RTL, and firmware leads to influence feature definition, implementation approach, and verification readiness early in the design cycle
- Own verification planning and execution for technically critical areas, including risk identification, trade-off analysis, and mitigation strategies
- Lead development of robust, scalable verification environments and methodologies, including directed and constrained-random testing using SystemVerilog and UVM
- Solve complex, ambiguous verification challenges, often requiring new approaches or extensions to existing processes and infrastructure
- Analyze functional and code coverage at a system level, driving coverage closure strategies that balance quality, schedule, and compute efficiency
- Drive improvements to verification processes, tools, and workflows that increase productivity, quality, or execution efficiency across teams
- Coordinate and technically lead small verification efforts within larger programs, aligning stakeholders and delivering on shared objectives
- Mentor and coach junior and senior engineers, acting as a go-to technical resource and influencing best practices across the organization
PREFERRED EXPERIENCE:
- Proficient in IP level ASIC verification
- Proficient in debugging firmware and RTL code using simulation tools
- Proficient in using UVM testbenches and working in Linux and Windows environments
- Experienced with Verilog, System Verilog, C, and C++
- Developing UVM based verification frameworks and testbenches, processes and flows
- Automating workflows in a distributed compute environment
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
- Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
- Good working knowledge of SystemC and TLM with some related experience
- Scripting language experience: Perl, Ruby, Makefile, shell preferred
- Experience working with complex designs (not just I2C and other similar designs)
ACADEMIC CREDENTIALS:
BS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science preferred.
LOCATION: Santa Clara, CA
LI-MF2
LI-HYBRID
QUALIFICATIONS
Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.
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Get Access To All JobsTips for Finding Visa Sponsorship as a Verification Engineer
Target semiconductor and hardware companies first
Firms like Intel, Qualcomm, and NVIDIA have large verification teams and well-established H-1B sponsorship processes. They file petitions regularly and understand the timeline, which reduces friction compared to companies sponsoring for the first time.
Lead with your HDL and tool expertise
Proficiency in SystemVerilog, UVM, and simulation tools like Synopsys VCS or Cadence Xcelium signals specialized knowledge that supports your H-1B specialty occupation case. Generic resumes lose this detail, make the technical stack prominent.
Align your degree to the role explicitly
Verification engineering requires electrical engineering, computer engineering, or computer science. If your degree is adjacent, a credentials evaluation confirming equivalency to a U.S. bachelor's strengthens the petition and reduces the risk of an RFE.
Ask about the LCA before accepting an offer
The Labor Condition Application locks in your work location and wage level before the H-1B petition is filed. Confirm your employer has filed or is prepared to file the LCA promptly, delays there push back your entire start date.
Defense contractors require early eligibility screening
Many verification roles at defense-adjacent companies require a security clearance. Visa holders can face restrictions on clearance eligibility, so confirm the role is open to sponsored candidates before investing time in the interview process.
Document your verification methodology in your resume
Coverage closure, assertion-based verification, and constrained-random testing are job-specific methods that help establish the specialized nature of the role. Strong documentation of your methodology supports both your application and the employer's H-1B petition.
Frequently Asked Questions
Does verification engineer qualify as an H-1B specialty occupation?
Yes. Verification engineering consistently qualifies as a specialty occupation because the role requires a bachelor's degree or higher in electrical engineering, computer engineering, or computer science as a standard industry requirement. USCIS approval rates for engineering petitions are among the highest of any H-1B visa category, though RFEs can arise if the job description is broad or the degree field is not directly related to the listed duties.
Which visa types are available to verification engineers beyond the H-1B?
Australian citizens can pursue the E-3 visa, which has no lottery and is renewable indefinitely. Canadian and Mexican nationals may qualify under the TN visa for engineers. Those with an extraordinary publication or contribution record in chip design or formal verification may be competitive for the O-1A. Each path has different employer obligations, so the right choice depends on your citizenship and the employer's preference.
How common is H-1B sponsorship for verification engineers?
Sponsorship is relatively common in this role. Semiconductor companies, EDA tool vendors, and cloud hardware teams rely heavily on international talent and file H-1B petitions routinely. Sponsorship is less common at smaller startups without a dedicated HR and legal infrastructure. Migrate Mate filters specifically for verification engineer roles at companies that sponsor, so you can focus applications on employers already set up to hire internationally.
Can I qualify for a verification engineer role without a four-year degree?
A relevant two-year degree combined with substantial hands-on experience may satisfy the H-1B requirement under the three-for-one rule, where three years of specialized experience substitutes for one year of formal education. In practice, USCIS scrutinizes these petitions more closely, and the experience must be directly in verification, not general engineering. A credential evaluation from a NACES-approved organization is strongly recommended if you're using this pathway.
What should I know about H-1B cap timing as a verification engineer?
The H-1B cap lottery opens in March each year for an October 1 start date. If you're on OPT, you need to register in March and win the lottery to maintain continuous work authorization. Cap-exempt employers, universities, certain nonprofits, and government research institutions, can file outside the lottery window, which is worth considering if your OPT timeline is tight or you missed a lottery cycle.
What is the prevailing wage requirement for sponsored Verification Engineer jobs?
U.S. employers sponsoring a visa must pay at least the prevailing wage, which is what workers in the same role, area, and experience level typically earn. The Department of Labor sets this rate to make sure companies aren't hiring foreign workers simply because they'd accept lower pay than a U.S. worker. It varies by job title, location, and experience. You can look up current prevailing wage rates for any occupation and location using the OFLC Wage Search page.