VLSI Engineer Jobs
VLSI Engineer jobs are open across semiconductor, defense, consumer electronics, and EDA industries, from new-grad to principal and staff levels, with specializations in digital design, analog and mixed-signal, and verification. See the openings below and apply to the ones that match your experience.
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Job Description:
We are looking for a detail-oriented and experienced VLSI ASIC Verification Engineer to join our silicon engineering team. In this role, you will own the functional verification of complex digital blocks and subsystems. You will build scalable, reusable UVM testbenches, drive constrained-random and assertion-based verification, and ensure zero-bug tape-outs.
Key Responsibilities
- Verification Planning: Analyze micro-architectural specifications to create comprehensive verification plans, trace requirements, and identify edge/corner cases.
- Testbench Development: Design and build modular, reusable verification environments and testbenches using SystemVerilog and Universal Verification Methodology (UVM).
- Stimulus & Scoreboarding: Develop constrained-random stimulus, functional coverage models, scoreboards, and reference models.
- Assertions & Debug: Write SystemVerilog Assertions (SVA) to catch design violations early, run simulations, debug waveforms, and root-cause RTL-to-testbench mismatches.
- Coverage Closure: Drive functional and code coverage to 100% closure prior to tape-out.
- Automation & Regressions: Maintain automated regression suites using scripting languages like Python, Perl, or Tcl.
Required Qualifications
- Education: B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
- Experience: minimum 8 years of hands-on experience in ASIC, SoC, or IP design verification.
- Core Methodologies: Deep proficiency in SystemVerilog and UVM architectures (agents, drivers, monitors, scoreboards, virtual sequences).
- Bus Protocols: Solid working knowledge of AMBA protocols (AXI, AHB, APB) and memory/DMA controllers.
- Verification Techniques: Proven track record in constrained-random verification, functional coverage closure, and assertion-based verification (SVA).
- EDA Tools: Hands-on experience with industry-standard simulation and debug tools (e.g., Synopsys VCS, Cadence Xcelium/Incisive, Mentor/Siemens Questa, or Verdi).
- Scripting: Strong scripting skills (Ex: Python, Tcl, or Perl) for build-flow automation and regression management.
Preferred Qualifications
- Familiarity with formal verification tools and techniques.
- Processor Architectures: Hands-on verification experience with RISC-V, ARM, or x86 core or subsystem architectures.
- CPU Pipeline & Core Verification: Deep understanding of processor pipelines, branch prediction, out-of-order execution, superscalar designs, and execution units (ALU/FPU).
- Memory Subsystem Expertise: Familiarity with verifying complex memory hierarchies, including L1/L2 caches, cache coherency protocols (AMBA CHI / ACE), MMUs, and virtual memory management.
- Exposure to high-speed interfaces or external protocols (DDR, PCIe, NVMe, SATA, or SAS).
Compensation and Benefits
The annual base salary range for this position is USD 109,700.00 To USD 175,500.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Please Note:
1. If you are a first time user, please create your candidate login account before you apply for a job.
2. If you already have a Candidate Account, please Sign-In before you apply.
Job Description:
We are looking for a detail-oriented and experienced VLSI ASIC Verification Engineer to join our silicon engineering team. In this role, you will own the functional verification of complex digital blocks and subsystems. You will build scalable, reusable UVM testbenches, drive constrained-random and assertion-based verification, and ensure zero-bug tape-outs.
Key Responsibilities
- Verification Planning: Analyze micro-architectural specifications to create comprehensive verification plans, trace requirements, and identify edge/corner cases.
- Testbench Development: Design and build modular, reusable verification environments and testbenches using SystemVerilog and Universal Verification Methodology (UVM).
- Stimulus & Scoreboarding: Develop constrained-random stimulus, functional coverage models, scoreboards, and reference models.
- Assertions & Debug: Write SystemVerilog Assertions (SVA) to catch design violations early, run simulations, debug waveforms, and root-cause RTL-to-testbench mismatches.
- Coverage Closure: Drive functional and code coverage to 100% closure prior to tape-out.
- Automation & Regressions: Maintain automated regression suites using scripting languages like Python, Perl, or Tcl.
Required Qualifications
- Education: B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
- Experience: minimum 8 years of hands-on experience in ASIC, SoC, or IP design verification.
- Core Methodologies: Deep proficiency in SystemVerilog and UVM architectures (agents, drivers, monitors, scoreboards, virtual sequences).
- Bus Protocols: Solid working knowledge of AMBA protocols (AXI, AHB, APB) and memory/DMA controllers.
- Verification Techniques: Proven track record in constrained-random verification, functional coverage closure, and assertion-based verification (SVA).
- EDA Tools: Hands-on experience with industry-standard simulation and debug tools (e.g., Synopsys VCS, Cadence Xcelium/Incisive, Mentor/Siemens Questa, or Verdi).
- Scripting: Strong scripting skills (Ex: Python, Tcl, or Perl) for build-flow automation and regression management.
Preferred Qualifications
- Familiarity with formal verification tools and techniques.
- Processor Architectures: Hands-on verification experience with RISC-V, ARM, or x86 core or subsystem architectures.
- CPU Pipeline & Core Verification: Deep understanding of processor pipelines, branch prediction, out-of-order execution, superscalar designs, and execution units (ALU/FPU).
- Memory Subsystem Expertise: Familiarity with verifying complex memory hierarchies, including L1/L2 caches, cache coherency protocols (AMBA CHI / ACE), MMUs, and virtual memory management.
- Exposure to high-speed interfaces or external protocols (DDR, PCIe, NVMe, SATA, or SAS).
Compensation and Benefits
The annual base salary range for this position is USD 109,700.00 To USD 175,500.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
See All 21 VLSI Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
Find VLSI Engineer JobsVLSI Engineer Job Market
Who's Hiring
Top Industries Hiring
- Technology & Software
- Electronics & Hardware
What Employers Look For
The qualifications that appear most often in VLSI engineer jobs.
- Bachelor's or Master's degree in Electrical Engineering or Computer Engineering
- Proficiency in RTL design using Verilog or SystemVerilog
- Experience with industry EDA tools such as Synopsys or Cadence
- Hands-on experience with full-chip or block-level tapeout at advanced process nodes
- Knowledge of static timing analysis, DRC, and LVS verification flows
- Familiarity with low-power design techniques and design-for-test methodologies
Tips for Your VLSI Engineer Job Search
Tailor your resume to tapeout milestones
List the process nodes you've worked on, the number of tapeouts you've contributed to, and any silicon bring-up experience. Hiring managers in VLSI scan for node-specific depth first, so lead with that before general skills.
Apply early to roles that fit
Migrate Mate lists vlsi engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.
Distinguish your specialization clearly in applications
Digital, analog, mixed-signal, and physical design roles have different hiring pipelines. Use the exact specialization in your resume headline and cover letter so recruiters routing applications don't slot you into the wrong track.
Target companies by EDA tool stack
Job postings for VLSI roles almost always list specific EDA tools. Cross-reference your proficiency with Synopsys, Cadence, or Mentor toolchains against each posting and call out exact tool experience in your application materials.
Prepare for block-level design exercise interviews
Many VLSI interview loops include a whiteboard or take-home exercise asking you to design a small block from spec. Practice walking through design tradeoffs out loud, covering area, power, and timing constraints in a structured order.
Negotiate by citing comparable process node experience
When discussing compensation, anchor your ask to the process node complexity and tapeout responsibility of the role. Experience at advanced nodes carries a premium, so naming the nodes you've owned makes your leverage concrete and credible.
VLSI Engineer Jobs: Frequently Asked Questions
Which companies are hiring the most vlsi engineers?
Hewlett Packard Enterprise | HPE, NVIDIA, and Wipro are hiring the most vlsi engineers right now, with openings concentrated in California, Minnesota, and Texas, based on current listings on Migrate Mate as of November 2026. Demand tends to cluster around companies with active silicon development programs or new product tapeout cycles.
How many vlsi engineer jobs are remote?
About 67% of vlsi engineer openings are fully remote or hybrid as of November 2026, which is relatively low compared to software roles because lab access and EDA tool licensing often require on-site presence. Verification and front-end RTL design roles are the most likely to offer remote or hybrid arrangements within the field.
How do you become a vlsi engineer?
Start with a bachelor's degree in electrical or computer engineering with coursework in digital logic, computer architecture, and semiconductor devices. Build hands-on RTL design skills using Verilog or SystemVerilog through academic projects or open-source tape-outs. Develop familiarity with at least one major EDA toolchain. Many roles, especially those involving analog design or physical implementation, prefer or require a master's degree for deeper specialization.
Can you get hired as a vlsi engineer with little experience?
Yes, entry-level vlsi engineer roles exist, but competition is tight because employers want to see evidence of practical design work, not just coursework. Build a portfolio of RTL projects, contribute to open-source chip design initiatives, or pursue a tape-out through a university shuttle program. Internships at semiconductor companies convert to full-time offers at a high rate and are the most reliable path in without prior industry experience.
What does the vlsi engineer interview process look like?
Most VLSI interview loops start with a recruiter screen followed by a technical phone interview covering RTL coding, timing concepts, and tool familiarity. On-site or virtual rounds typically include one or two live coding exercises in Verilog or SystemVerilog, a design problem walkthrough, and a system-level architecture discussion. Some teams add a take-home design exercise. Senior roles often include a presentation of past tapeout work and a deeper conversation about design tradeoffs and silicon results.
Where can I find and apply to vlsi engineer jobs?
You can find and apply to vlsi engineer jobs on Migrate Mate, which lists current openings from across the United States. Search the listings to find roles that match your specialization and experience level, then apply directly to each one that fits.
See All 21 VLSI Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
Find VLSI Engineer Jobs