AI ML Intern Jobs in Austin, TX
AI ML Intern jobs in Austin, Texas concentrate in the Domain, East Austin, and the downtown tech corridor, where demand across enterprise software, semiconductor design, and healthtech is strong year-round. Employers posting roles right now include Amazon Web Services, AMD, and Amazon. Scan the live roles below and apply to whichever ones fit.
Find AI ML Intern JobsOverview
Open roles18
Top employerAmazon Web Services
Work type38% On-site
Top credentialBachelor's degree in electrical engineering
Companies hiring8
Showing 5 of 18+ AI ML Intern jobs
Sr Cloud Hardware Dev Engineer, AWS Generative AI & ML Servers
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Added 1w ago
Amazon Web Services
Sr Cloud Hardware Dev Engineer, AWS Generative AI & ML Servers
Austin, Texas
Added 1w ago
M
Machine Learning (ML) AI Task Auditor - Freelance AI Trainer Project
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M
Added 1w ago
Meridial
Machine Learning (ML) AI Task Auditor - Freelance AI Trainer Project
Austin, Texas
Added 1w ago
Senior Technical Product Manager – AI / ML
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Added 2w ago
CVS Health
Senior Technical Product Manager – AI / ML
Austin, Texas
Added 2w ago
F
AI / ML Engineer
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F
Added 2w ago
Forman Technology Group
AI / ML Engineer
Austin, Texas
Added 2w ago
2027 Undergrad Machine Learning (ML)/ Artificial Intelligence (AI) intern/co-op
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Added 3w ago
AMD
2027 Undergrad Machine Learning (ML)/ Artificial Intelligence (AI) intern/co-op
Austin, Texas
Added 3w ago
Added 1w ago
Sr Cloud Hardware Dev Engineer, AWS Generative AI & ML Servers
Amazon Web Services·Austin, Texas
Job functions:
$159k - $248k/yr
Bachelor's degree in electrical engineering
Job Description
DESCRIPTION
AWS operates the world's largest fleet of GPU-accelerated servers powering AI/ML training and inference at cloud scale. Our team defines the server architectures, drives the hardware designs, and owns the fleet quality for these platforms — from component selection through datacenter operations. If you want to shape the physical hardware that frontier models train on, this is the role.
We are seeking a Cloud Hardware Development Engineer to define server architectures based on workload demand, translate them into detailed component specifications, and drive validation from PCBA bring-up through rack integration. You will lead ODM design partners through development and production, triage hardware issues across manufacturing and datacenters, and own fleet quality metrics post-launch.
What You Will Do
You will define the hardware that runs the world's largest AI training workloads. Your designs span thermal, mechanical, power, and signal integrity across GPU-accelerated platforms. You will drive validation from first silicon through fleet-scale deployment, triage failures correlating across PCIe, power delivery, memory, and accelerator interconnects, and feed root cause findings back into design improvements. When a new server platform launches at a large scale, the architecture, component choices, and quality gates are yours.
Key job responsibilities
Architecture & Design
Validation & Bring-up
Fleet Quality & Continuous Improvement
Cross-Team Collaboration
May require occasional (
The Ideal Candidate
You think across the full hardware stack — from silicon packaging and power delivery to rack-level thermal and mechanical design. You are as comfortable reviewing a schematic as you are analyzing fleet failure data. You drive quality through data, not assumption, and you hold design partners to the same standard you hold yourself. You mentor and develop junior engineers, contribute to hiring, and share your expertise to make the team stronger.
Why You Will Love It
The world's most advanced frontier models train on the hardware you design. You will see your architecture decisions scale to a large fleet of servers. The team is deeply technical and high-trust — you own platforms end to end from architecture definition through fleet operations.
A day in the life
You start the day reviewing thermal and power validation data from an EVT build at your ODM partner. Mid-morning, you join a design review to close signal integrity findings on a high-speed accelerator interconnect. In the afternoon, you triage a fleet quality signal — correlating component-level failure data with manufacturing lot information to identify a systemic issue. You end the day aligning with architecture teams on requirements for the next-generation platform.
About the team
The Hardware Engineering AI/ML UltraServer platform team is a group of engineers and technical program managers directly responsible for launching GPU-accelerated servers into the AWS fleet. Located in Seattle, Austin, and Cupertino, we collaborate with global development teams and ODM partners to deliver next-generation AI/ML infrastructure deployed in datacenters worldwide. We move fast with small, empowered teams delivering end-to-end — from server conception through fleet-scale operations.
We are seeking a Cloud Hardware Development Engineer to define server architectures based on workload demand, translate them into detailed component specifications, and drive validation from PCBA bring-up through rack integration. You will lead ODM design partners through development and production, triage hardware issues across manufacturing and datacenters, and own fleet quality metrics post-launch.
What You Will Do
You will define the hardware that runs the world's largest AI training workloads. Your designs span thermal, mechanical, power, and signal integrity across GPU-accelerated platforms. You will drive validation from first silicon through fleet-scale deployment, triage failures correlating across PCIe, power delivery, memory, and accelerator interconnects, and feed root cause findings back into design improvements. When a new server platform launches at a large scale, the architecture, component choices, and quality gates are yours.
Key job responsibilities
Architecture & Design
- Define server architectures based on workload demand and customer requirements, translating them into detailed designs and component specifications that enable high-performance AI training and inference at scale
- Work with interdisciplinary teams of component, firmware, test, qualification, and integration engineers to deliver cohesive designs
- Drive design reviews with ODM/JDM partners covering schematic, layout, BOM, and manufacturing DFx (Design for Test, Design for Manufacturing)
Validation & Bring-up
- Define and execute validation strategies from PCBA bring-up through server and rack integration — covering power sequencing, signal integrity, thermal characterization, and accelerator interconnect performance
- Own hardware debug during EVT/DVT/PVT builds, correlating failures across PCIe, power rails, memory channels, and GPU subsystems
- Triage hardware issues at both ODM facilities and datacenters, conduct root cause analysis, and implement corrective actions
Fleet Quality & Continuous Improvement
- Own fleet quality metrics post-launch: server-level annualized failure rates and component-level failure modes
- Monitor operational telemetry to identify systemic issues and drive design or process changes for current and future platforms
- Partner with test and automation teams to improve manufacturing yield and reduce test dwell times
Cross-Team Collaboration
- Work with EC2 architecture teams to align on instance definitions, workload requirements, and platform trade-offs
- Drive ODM/JDM design partners through development milestones and production ramp
- Collaborate with firmware, software, and operations teams to ensure designs are debuggable, serviceable, and automation-ready
May require occasional (
The Ideal Candidate
You think across the full hardware stack — from silicon packaging and power delivery to rack-level thermal and mechanical design. You are as comfortable reviewing a schematic as you are analyzing fleet failure data. You drive quality through data, not assumption, and you hold design partners to the same standard you hold yourself. You mentor and develop junior engineers, contribute to hiring, and share your expertise to make the team stronger.
Why You Will Love It
The world's most advanced frontier models train on the hardware you design. You will see your architecture decisions scale to a large fleet of servers. The team is deeply technical and high-trust — you own platforms end to end from architecture definition through fleet operations.
A day in the life
You start the day reviewing thermal and power validation data from an EVT build at your ODM partner. Mid-morning, you join a design review to close signal integrity findings on a high-speed accelerator interconnect. In the afternoon, you triage a fleet quality signal — correlating component-level failure data with manufacturing lot information to identify a systemic issue. You end the day aligning with architecture teams on requirements for the next-generation platform.
About the team
The Hardware Engineering AI/ML UltraServer platform team is a group of engineers and technical program managers directly responsible for launching GPU-accelerated servers into the AWS fleet. Located in Seattle, Austin, and Cupertino, we collaborate with global development teams and ODM partners to deliver next-generation AI/ML infrastructure deployed in datacenters worldwide. We move fast with small, empowered teams delivering end-to-end — from server conception through fleet-scale operations.
BASIC QUALIFICATIONS
- Bachelor's degree in electrical engineering, computer engineering, or equivalent
- Experience in developing functional specifications, design verification plans and functional test procedures
- 7+ years of hardware design and development experience for server, compute, or large-scale infrastructure platforms
- Experience in one or more server technologies: thermal/mechanical design, power delivery, high-speed signal integrity, or accelerator subsystems
- Experience leading hardware development through full product lifecycle (concept through production ramp)
PREFERRED QUALIFICATIONS
- Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field
- 5+ years of experience working with ODMs through the product development and manufacturing lifecycle (EVT, DVT, PVT)
- In-depth expertise in high-speed bus design, signal integrity analysis, or power delivery for GPU/accelerator platforms
- 5+ years of experience with hardware bring-up, debug, and root cause analysis across PCIe, NVMe, memory, and accelerator interconnects
- Experience owning fleet quality metrics and driving design improvements based on operational failure data
- Experience with thermal/mechanical design for high-power-density compute platforms (liquid cooling, air cooling, or hybrid)
- Experience working in large-scale datacenter or cloud environments
- Track record of defining engineering standards and design best practices adopted across teams or partner organizations
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, CA, Cupertino - 183,000.00 - 247,600.00 USD annually
USA, TX, Austin - 159,200.00 - 215,300.00 USD annually
USA, WA, Seattle - 159,200.00 - 215,300.00 USD annually
Amazon Web Services
Sr Cloud Hardware Dev Engineer, AWS Generative AI & ML Servers
Austin, Texas
Added 1w ago
Job functions:
$159k - $248k/yr
Bachelor's degree in electrical engineering
Job Description
DESCRIPTION
AWS operates the world's largest fleet of GPU-accelerated servers powering AI/ML training and inference at cloud scale. Our team defines the server architectures, drives the hardware designs, and owns the fleet quality for these platforms — from component selection through datacenter operations. If you want to shape the physical hardware that frontier models train on, this is the role.
We are seeking a Cloud Hardware Development Engineer to define server architectures based on workload demand, translate them into detailed component specifications, and drive validation from PCBA bring-up through rack integration. You will lead ODM design partners through development and production, triage hardware issues across manufacturing and datacenters, and own fleet quality metrics post-launch.
What You Will Do
You will define the hardware that runs the world's largest AI training workloads. Your designs span thermal, mechanical, power, and signal integrity across GPU-accelerated platforms. You will drive validation from first silicon through fleet-scale deployment, triage failures correlating across PCIe, power delivery, memory, and accelerator interconnects, and feed root cause findings back into design improvements. When a new server platform launches at a large scale, the architecture, component choices, and quality gates are yours.
Key job responsibilities
Architecture & Design
Validation & Bring-up
Fleet Quality & Continuous Improvement
Cross-Team Collaboration
May require occasional (
The Ideal Candidate
You think across the full hardware stack — from silicon packaging and power delivery to rack-level thermal and mechanical design. You are as comfortable reviewing a schematic as you are analyzing fleet failure data. You drive quality through data, not assumption, and you hold design partners to the same standard you hold yourself. You mentor and develop junior engineers, contribute to hiring, and share your expertise to make the team stronger.
Why You Will Love It
The world's most advanced frontier models train on the hardware you design. You will see your architecture decisions scale to a large fleet of servers. The team is deeply technical and high-trust — you own platforms end to end from architecture definition through fleet operations.
A day in the life
You start the day reviewing thermal and power validation data from an EVT build at your ODM partner. Mid-morning, you join a design review to close signal integrity findings on a high-speed accelerator interconnect. In the afternoon, you triage a fleet quality signal — correlating component-level failure data with manufacturing lot information to identify a systemic issue. You end the day aligning with architecture teams on requirements for the next-generation platform.
About the team
The Hardware Engineering AI/ML UltraServer platform team is a group of engineers and technical program managers directly responsible for launching GPU-accelerated servers into the AWS fleet. Located in Seattle, Austin, and Cupertino, we collaborate with global development teams and ODM partners to deliver next-generation AI/ML infrastructure deployed in datacenters worldwide. We move fast with small, empowered teams delivering end-to-end — from server conception through fleet-scale operations.
We are seeking a Cloud Hardware Development Engineer to define server architectures based on workload demand, translate them into detailed component specifications, and drive validation from PCBA bring-up through rack integration. You will lead ODM design partners through development and production, triage hardware issues across manufacturing and datacenters, and own fleet quality metrics post-launch.
What You Will Do
You will define the hardware that runs the world's largest AI training workloads. Your designs span thermal, mechanical, power, and signal integrity across GPU-accelerated platforms. You will drive validation from first silicon through fleet-scale deployment, triage failures correlating across PCIe, power delivery, memory, and accelerator interconnects, and feed root cause findings back into design improvements. When a new server platform launches at a large scale, the architecture, component choices, and quality gates are yours.
Key job responsibilities
Architecture & Design
- Define server architectures based on workload demand and customer requirements, translating them into detailed designs and component specifications that enable high-performance AI training and inference at scale
- Work with interdisciplinary teams of component, firmware, test, qualification, and integration engineers to deliver cohesive designs
- Drive design reviews with ODM/JDM partners covering schematic, layout, BOM, and manufacturing DFx (Design for Test, Design for Manufacturing)
Validation & Bring-up
- Define and execute validation strategies from PCBA bring-up through server and rack integration — covering power sequencing, signal integrity, thermal characterization, and accelerator interconnect performance
- Own hardware debug during EVT/DVT/PVT builds, correlating failures across PCIe, power rails, memory channels, and GPU subsystems
- Triage hardware issues at both ODM facilities and datacenters, conduct root cause analysis, and implement corrective actions
Fleet Quality & Continuous Improvement
- Own fleet quality metrics post-launch: server-level annualized failure rates and component-level failure modes
- Monitor operational telemetry to identify systemic issues and drive design or process changes for current and future platforms
- Partner with test and automation teams to improve manufacturing yield and reduce test dwell times
Cross-Team Collaboration
- Work with EC2 architecture teams to align on instance definitions, workload requirements, and platform trade-offs
- Drive ODM/JDM design partners through development milestones and production ramp
- Collaborate with firmware, software, and operations teams to ensure designs are debuggable, serviceable, and automation-ready
May require occasional (
The Ideal Candidate
You think across the full hardware stack — from silicon packaging and power delivery to rack-level thermal and mechanical design. You are as comfortable reviewing a schematic as you are analyzing fleet failure data. You drive quality through data, not assumption, and you hold design partners to the same standard you hold yourself. You mentor and develop junior engineers, contribute to hiring, and share your expertise to make the team stronger.
Why You Will Love It
The world's most advanced frontier models train on the hardware you design. You will see your architecture decisions scale to a large fleet of servers. The team is deeply technical and high-trust — you own platforms end to end from architecture definition through fleet operations.
A day in the life
You start the day reviewing thermal and power validation data from an EVT build at your ODM partner. Mid-morning, you join a design review to close signal integrity findings on a high-speed accelerator interconnect. In the afternoon, you triage a fleet quality signal — correlating component-level failure data with manufacturing lot information to identify a systemic issue. You end the day aligning with architecture teams on requirements for the next-generation platform.
About the team
The Hardware Engineering AI/ML UltraServer platform team is a group of engineers and technical program managers directly responsible for launching GPU-accelerated servers into the AWS fleet. Located in Seattle, Austin, and Cupertino, we collaborate with global development teams and ODM partners to deliver next-generation AI/ML infrastructure deployed in datacenters worldwide. We move fast with small, empowered teams delivering end-to-end — from server conception through fleet-scale operations.
BASIC QUALIFICATIONS
- Bachelor's degree in electrical engineering, computer engineering, or equivalent
- Experience in developing functional specifications, design verification plans and functional test procedures
- 7+ years of hardware design and development experience for server, compute, or large-scale infrastructure platforms
- Experience in one or more server technologies: thermal/mechanical design, power delivery, high-speed signal integrity, or accelerator subsystems
- Experience leading hardware development through full product lifecycle (concept through production ramp)
PREFERRED QUALIFICATIONS
- Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field
- 5+ years of experience working with ODMs through the product development and manufacturing lifecycle (EVT, DVT, PVT)
- In-depth expertise in high-speed bus design, signal integrity analysis, or power delivery for GPU/accelerator platforms
- 5+ years of experience with hardware bring-up, debug, and root cause analysis across PCIe, NVMe, memory, and accelerator interconnects
- Experience owning fleet quality metrics and driving design improvements based on operational failure data
- Experience with thermal/mechanical design for high-power-density compute platforms (liquid cooling, air cooling, or hybrid)
- Experience working in large-scale datacenter or cloud environments
- Track record of defining engineering standards and design best practices adopted across teams or partner organizations
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, CA, Cupertino - 183,000.00 - 247,600.00 USD annually
USA, TX, Austin - 159,200.00 - 215,300.00 USD annually
USA, WA, Seattle - 159,200.00 - 215,300.00 USD annually
See All 18 AI ML Intern Jobs in Austin
Find roles in Austin that match your experience and apply in just a few clicks.
Find AI ML Intern JobsAI ML Intern Job Market in Austin
Who's Hiring
Top Industries Hiring
- Technology & Software
- Retail
- E-Commerce & Online Marketplaces
- Electronics & Hardware
AI ML Intern Jobs in Austin: Frequently Asked Questions
How do I get a ai ml intern job in Austin?
Target Austin's highest-concentration hiring sectors: enterprise software companies clustered in the Domain, semiconductor and hardware firms in North Austin, and healthtech startups in East Austin. Candidates who stand out bring hands-on Python or model-training project work, even from coursework or personal repositories. UT Austin and ACC connections also give local candidates an edge, since many Austin employers recruit directly from those pipelines.
Which companies hire ai ml interns in Austin?
Austin ai ml intern roles are posted by Amazon Web Services, AMD, and Amazon and others right now, based on current listings on Migrate Mate as of September 2026. Austin's hiring mix skews toward high-growth tech firms, established semiconductor companies, and a dense layer of venture-backed AI startups that treat internships as a direct recruiting pipeline.
Are there remote ai ml intern jobs in Austin?
Yes, though availability depends heavily on the role type. Model training, data labeling, and research-oriented tasks tend to be remote-compatible, while hardware integration or lab-based ML work typically requires in-person presence. About 63% of ai ml intern openings tied to Austin are remote or hybrid as of September 2026, and the analytical and software-heavy roles at Austin's enterprise tech employers are the most likely to offer that flexibility.
How can I get a ai ml intern job in Austin with little or no experience?
The most realistic entry path in Austin is through project-based applications: build a small, documented ML project on GitHub and lead with it. Austin employers, especially early-stage AI startups in East Austin and research arms of larger tech firms, regularly hire interns who show applied curiosity over formal experience. Research assistant roles at UT Austin's AI labs are also a strong lateral entry point that local hiring managers recognize.
Which industries hire the most ai ml interns in Austin?
Most ai ml intern openings in Austin sit in Technology & Software, Retail, and E-Commerce & Online Marketplaces, per current listings on Migrate Mate as of September 2026. Austin's combination of a major research university, a dense semiconductor manufacturing base, and one of the fastest-growing enterprise software ecosystems in the country makes those sectors the consistent drivers of local ML intern demand.
See All 18 AI ML Intern Jobs in Austin
Find roles in Austin that match your experience and apply in just a few clicks.
Find AI ML Intern Jobs