Architect Jobs in Sunnyvale, CA
Architect jobs in Sunnyvale, California are concentrated in the downtown Murphy Avenue corridor, the Lawrence Expressway commercial zone, and the Moffett Park business district, with steady openings across corporate campus design, mixed-use development, and tech-sector build-outs. Employers actively hiring include Meta, Apple, and Synopsys. Find a role that fits below and apply directly.
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Showing 4 of 466+ Architect jobs
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 5 years of experience in computer architecture, chip architecture, IP architecture, co-design, performance analysis, or hardware design.
- Experience in developing software systems in C++ or Python.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on Computer Architecture, or a related field.
- 8 years of experience in computer architecture, chip architecture, IP architecture, co-design, performance analysis, or hardware design.
- Experience in processor design or accelerator designs and mapping ML models to hardware architectures.
- Experience with deep learning frameworks including TensorFlow and PyTorch.
- Knowledge of Machine Learning market, technological and business trends, software ecosystem, and emerging applications.
- Knowledge of hardware/software stack for deep learning accelerators.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.In this role, you will be at the forefront of advancing ML accelerator performance and efficiency, employing a approach that spans compiler interactions, system modeling, power architecture, and host system integration. You will prototype new hardware features, such as instruction extensions and memory layouts, by leveraging existing compiler and runtime stacks, and develop transaction-level models for early performance estimation and workload simulation. A critical part of your work will be to optimize the accelerator design for maximum performance under strict power and thermal constraints this includes evaluating novel power technologies and collaborating on thermal design. You will streamline host-accelerator interactions, minimize data transfer overheads, ensure seamless software integration across different operational modes like training and inference, and devise strategies to enhance overall ML hardware utilization. To achieve these goals, you will collaborate closely with specialized teams, including XLA (Accelerated Linear Algebra) compiler, Platforms performance, package, and system design to transition innovations to production and maintain a unified approach to modeling and system optimization.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Create differentiated architectural innovations for Google’s semiconductor Tensor Processing Unit (TPU) roadmap.
- Evaluate the power, performance, and cost of prospective architecture and subsystems.
- Collaborate with partners in Hardware Design, Software, Compiler, ML Model and Research teams for hardware/software co-design.
- Work on Machine Learning (ML) workload characterization and benchmarking.
- Develop architecture for differentiating features on next generation TPUs.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 5 years of experience in computer architecture, chip architecture, IP architecture, co-design, performance analysis, or hardware design.
- Experience in developing software systems in C++ or Python.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on Computer Architecture, or a related field.
- 8 years of experience in computer architecture, chip architecture, IP architecture, co-design, performance analysis, or hardware design.
- Experience in processor design or accelerator designs and mapping ML models to hardware architectures.
- Experience with deep learning frameworks including TensorFlow and PyTorch.
- Knowledge of Machine Learning market, technological and business trends, software ecosystem, and emerging applications.
- Knowledge of hardware/software stack for deep learning accelerators.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.In this role, you will be at the forefront of advancing ML accelerator performance and efficiency, employing a approach that spans compiler interactions, system modeling, power architecture, and host system integration. You will prototype new hardware features, such as instruction extensions and memory layouts, by leveraging existing compiler and runtime stacks, and develop transaction-level models for early performance estimation and workload simulation. A critical part of your work will be to optimize the accelerator design for maximum performance under strict power and thermal constraints this includes evaluating novel power technologies and collaborating on thermal design. You will streamline host-accelerator interactions, minimize data transfer overheads, ensure seamless software integration across different operational modes like training and inference, and devise strategies to enhance overall ML hardware utilization. To achieve these goals, you will collaborate closely with specialized teams, including XLA (Accelerated Linear Algebra) compiler, Platforms performance, package, and system design to transition innovations to production and maintain a unified approach to modeling and system optimization.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Create differentiated architectural innovations for Google’s semiconductor Tensor Processing Unit (TPU) roadmap.
- Evaluate the power, performance, and cost of prospective architecture and subsystems.
- Collaborate with partners in Hardware Design, Software, Compiler, ML Model and Research teams for hardware/software co-design.
- Work on Machine Learning (ML) workload characterization and benchmarking.
- Develop architecture for differentiating features on next generation TPUs.
See All 466+ Architect Jobs in Sunnyvale
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Find Architect JobsArchitect Job Market in Sunnyvale
Who's Hiring
- Meta86
- Apple52
- Synopsys52
- Google35
- Infosys35
Top Industries Hiring
- Technology & Software35
- Science & Research17
- Electronics & Hardware17
Architect Jobs in Sunnyvale: Frequently Asked Questions
How do I get a architect job in Sunnyvale?
Sunnyvale's architect market is driven by corporate campus renovations, large-scale mixed-use infill projects, and municipal redevelopment around the downtown transit corridor. Firms specializing in commercial, life sciences, and tech-sector interiors hire most actively here. Candidates who combine BIM proficiency with experience on ground-up commercial or adaptive reuse projects stand out, and direct outreach to mid-size local design firms often surfaces openings before they are posted publicly.
Which companies hire architects in Sunnyvale?
Sunnyvale architect roles are posted by Meta, Apple, and Synopsys and others right now, based on current listings on Migrate Mate as of September 2026. Sunnyvale's employer mix leans toward corporate real estate teams, regional design-build contractors, and technology companies managing large owned or leased campuses in the city.
Are there remote architect jobs in Sunnyvale?
Yes, though with limits, since hands-on design coordination, site visits, and permit reviews require in-person presence for most architecture roles. About 38% of architect openings tied to Sunnyvale are remote or hybrid as of September 2026, and the roles most likely to carry that flexibility are schematic design, BIM coordination, and planning-phase project work rather than construction administration.
How can I get a architect job in Sunnyvale with little or no experience?
The most realistic entry path in Sunnyvale is an intern architect or junior designer role at a mid-size commercial or corporate interiors firm, several of which are headquartered in or near the city. Sunnyvale's volume of tenant improvement and corporate campus projects creates consistent demand for production-level drafting and BIM support work, which is where most early-career architects start. A strong portfolio of school or internship projects showing commercial or workplace design focus gives candidates a clear edge locally.
Which industries hire the most architects in Sunnyvale?
The sectors hiring the most architects in Sunnyvale are Technology & Software, Science & Research, and Electronics & Hardware, based on current listings on Migrate Mate as of September 2026. Sunnyvale's concentration of technology campuses, life sciences facilities, and ongoing downtown redevelopment keeps demand across those sectors consistently active throughout the year.
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