Entry Level ASIC Design Engineer Jobs
New grad asic design engineer jobs are open to recent graduates and entry level candidates with zero to two years of experience, where strong coursework in RTL design, a capstone project, or an internship at a chip company can matter more than a long resume. Most openings are on-site roles across Technology & Software, Electronics & Hardware, and Telecommunications, with employers like NVIDIA, Qualcomm, and Apple hiring at this level now.
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As an AI/ML driven ASIC Design and Implementation Automation Engineer in our Advanced Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of results (power, performance, area, and quality) for SoC and IP development teams across the organization. You'll be working and connecting with AI/ML and automation experts in the industry as well as academia to explore state-of-the-art AI/ML CAD techniques as a part of VLSI CAD SW, prescribe key methods and requirements for tools & features to leverage for ASIC design.
In this role, you will develop prototype solutions to evaluate various state-of-the-art AI/ML techniques to identify the best solutions for NXP designs. While exploring these new ways of working, successful candidates will be working on actual designs and implementation to pilot and develop the automation.
This opportunity is within ACE Design Methodologies and Automation organization to enable transformation to leverage state-of-the-art AI/ML ideas to improve NXP designs for the Automotive Processors and Advanced microcontrollers in NXP.
The right candidate will be working in a fast-paced engineering environment, on a leading-edge advanced node technologies enabling automated building of exciting and complex SoCs.
Job Summary
- Explore research ideas and solutions that bring AI/ML applications to VLSI design
- Work closely with Academic research communities in AI/ML for VLSI design, Architecture teams, IP and SoC designers and SoC Implementation teams from multiple sites to explore and evaluate for leading edge SoC technologies serving multiple industries
- These automation applications include use of GenAI, Reinforcement Learning, Graph Neural Networks, and convolutional Networks
- Strong AI/ML expertise, software and CAD background required
Cross Functional Aspects
- In this role, the candidate will work with multiple NXP Engineering teams, including Architecture, IP & SoC design, verification and implementation functions, coordinate and drive groundbreaking initiatives for Digital Transformation.
Qualifications
- BS or MS in Computer Science, Electrical Engineering, Computer Engineering or related disciplines with strong background in SW development
- Hands-on expertise in programming using Python/C++
- 1-2 years of experience in AI and ML techniques (LLMs, CNN, RNN, and GraphNN) with experience of application to real world optimization problems
- Data structures, algorithms, and SW development for optimization problems
- Hands on experience in Unix/Linux, revision control (Git, BitBucket), SW development and debug tools
- Excellent analytical problem-solving skills
- Strong verbal and written communication skills
Desirable Skills/experience
- Strong understanding of design, layout, constraints (SDC, Clocks, CDC, RDC), Static timing analysis, Low-power, and Power-aware flows (UPF)
- Prior experience in VLSI CAD methodology and tool development
- Good understanding of HDL: System Verilog, Verilog, VHDL, front-end design, physical design and layout implementation/generation flows and tools
- Understanding or prior experience with EDA tools for design, verification, DFT and implementation
- Experience with Design revision control (GIT, DesignSync) and Make
- Splunk, Jenkins, LSF and CI/CD process
Job location:
- Austin, TX
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
#LI-e41bAs an AI/ML driven ASIC Design and Implementation Automation Engineer in our Advanced Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of results (power, performance, area, and quality) for SoC and IP development teams across the organization. You'll be working and connecting with AI/ML and automation experts in the industry as well as academia to explore state-of-the-art AI/ML CAD techniques as a part of VLSI CAD SW, prescribe key methods and requirements for tools & features to leverage for ASIC design.
In this role, you will develop prototype solutions to evaluate various state-of-the-art AI/ML techniques to identify the best solutions for NXP designs. While exploring these new ways of working, successful candidates will be working on actual designs and implementation to pilot and develop the automation.
This opportunity is within ACE Design Methodologies and Automation organization to enable transformation to leverage state-of-the-art AI/ML ideas to improve NXP designs for the Automotive Processors and Advanced microcontrollers in NXP.
The right candidate will be working in a fast-paced engineering environment, on a leading-edge advanced node technologies enabling automated building of exciting and complex SoCs.
Job Summary
- Explore research ideas and solutions that bring AI/ML applications to VLSI design
- Work closely with Academic research communities in AI/ML for VLSI design, Architecture teams, IP and SoC designers and SoC Implementation teams from multiple sites to explore and evaluate for leading edge SoC technologies serving multiple industries
- These automation applications include use of GenAI, Reinforcement Learning, Graph Neural Networks, and convolutional Networks
- Strong AI/ML expertise, software and CAD background required
Cross Functional Aspects
- In this role, the candidate will work with multiple NXP Engineering teams, including Architecture, IP & SoC design, verification and implementation functions, coordinate and drive groundbreaking initiatives for Digital Transformation.
Qualifications
- BS or MS in Computer Science, Electrical Engineering, Computer Engineering or related disciplines with strong background in SW development
- Hands-on expertise in programming using Python/C++
- 1-2 years of experience in AI and ML techniques (LLMs, CNN, RNN, and GraphNN) with experience of application to real world optimization problems
- Data structures, algorithms, and SW development for optimization problems
- Hands on experience in Unix/Linux, revision control (Git, BitBucket), SW development and debug tools
- Excellent analytical problem-solving skills
- Strong verbal and written communication skills
Desirable Skills/experience
- Strong understanding of design, layout, constraints (SDC, Clocks, CDC, RDC), Static timing analysis, Low-power, and Power-aware flows (UPF)
- Prior experience in VLSI CAD methodology and tool development
- Good understanding of HDL: System Verilog, Verilog, VHDL, front-end design, physical design and layout implementation/generation flows and tools
- Understanding or prior experience with EDA tools for design, verification, DFT and implementation
- Experience with Design revision control (GIT, DesignSync) and Make
- Splunk, Jenkins, LSF and CI/CD process
Job location:
- Austin, TX
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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Entry Level ASIC Design Engineer Jobs: Frequently Asked Questions
How do I get an entry level asic design engineer job?
Employers hiring at the entry level look for hands-on RTL design experience, typically from coursework, a senior capstone project, or an internship. Proficiency in Verilog or SystemVerilog is the baseline, and familiarity with synthesis tools or simulation environments gives candidates a real edge. A GitHub portfolio showing a working digital design, even a simple pipelined processor, signals readiness more concretely than a degree alone.
Which companies hire entry level asic design engineers?
Companies hiring entry level asic design engineers right now include NVIDIA, Qualcomm, and Apple, based on current listings on Migrate Mate as of August 2026. Hiring at this level comes from a broad mix of semiconductor firms, defense electronics contractors, and consumer electronics companies that maintain dedicated early-career or new-grad engineering programs.
Are there remote entry level asic design engineer jobs?
Yes, though most roles at this level are on-site given the lab and tool access that ASIC work requires. About 0% of entry level asic design engineer openings are remote or hybrid as of August 2026, with hybrid arrangements more common than fully remote at the junior stage. Checking each listing for a clear work-location policy before applying saves time.
Are these new grad asic design engineer jobs?
Yes, the listings here include new grad, recent graduate, and junior asic design engineer roles alongside other entry level openings. A posting is generally new-grad friendly when it welcomes zero to two years of experience, counts internships or academic projects toward that requirement, or explicitly invites candidates with a strong portfolio in place of professional history. Those signals indicate the employer is set up to develop early-career engineers.
Which industries hire the most entry level asic design engineers?
Entry Level asic design engineer roles concentrate in Technology & Software, Electronics & Hardware, and Telecommunications, based on current listings on Migrate Mate as of August 2026. Those sectors drive hiring at this level because they are building or scaling custom silicon programs and need junior designers who can contribute to RTL development, verification, and simulation work from day one.