Asic Verification Engineer Jobs in California
Asic verification engineer jobs in California represent one of the most active and competitive markets in the country, concentrated in semiconductor and fabless chip design, consumer electronics, and automotive silicon, with openings at every level from junior verification engineer through principal and staff engineer. The largest hiring clusters are in San Jose, San Diego, and Santa Clara, where companies like Qualcomm, Apple, and Intel maintain substantial design and verification teams. Functional coverage verification, UVM methodology, and formal verification are the most consistently in-demand specialties across California listings. Find a role that fits below and apply directly.
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About Eridu
Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI. Today’s AI performance is frequently limited by communication bottlenecks. Eridu delivers multiple industry-first innovations across silicon, packaging, software, and systems to deliver a step function in AI networking – a network switch that is an order of magnitude improvement in bandwidth and radix versus today’s “state of the art” switches. This is the first silicon and system designed from the ground up for AI and the increase in radix and throughput unlocks greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs, improving reliability, simplifying operations and speeding AI data center deployments for faster time to revenue.
The company’s solutions and value proposition have been widely validated by leading hyperscalers.
The company has raised $200M to date including its most recent, oversubscribed Series A round led by Socratic Partners, John Doerr, Hudson River Trading, Capricorn Investment Group and Matter Venture Partners, with participation by SBVA, MediaTek, Bosch Ventures, TDK Ventures, Eclipse Ventures, and VentureTech Alliance, among others.
Eridu is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exists, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu has also assembled a world class IP, design and manufacturing ecosystem to execute on its vision, and counts TSMC as a key partner in our journey.
Visit our website eridu.ai to learn more.
Position Overview
We are seeking a hands-on ASIC Design Verification Lead to own verification execution for complex, high-performance networking silicon. This role is a senior technical leadership position focused on driving verification strategy, infrastructure, and closure, while remaining deeply involved in day-to-day hands-on verification work.
This is not a people-manager-only role. The ideal candidate is a highly technical verification leader who has personally taken chips to tape-out, understands how verification breaks late in the cycle, and can drive functional correctness, coverage closure, and tape-out readiness in a fast-moving startup environment.
Responsibilities
Verification Strategy & Execution
- Define and own block-, subsystem-, and chip-level verification strategies
- Develop and maintain scalable verification environments using SystemVerilog and UVM
- Drive execution from test-plan definition through coverage and bug closure
- Ensure verification readiness as a gating requirement for tape-out
Hands-on Verification Development
- Write and review high-quality testbenches, sequences, checkers, and scoreboards
- Develop constrained-random, directed, and stress tests to validate complex corner cases
- Actively debug functional failures across RTL, testbench, and simulation environments
Coverage & Quality Ownership
- Define functional, code, and assertion coverage goals
- Analyze coverage results and identify verification gaps
- Provide clear, actionable feedback to RTL designers to improve design and test quality
Cross-Functional Debug & Collaboration
- Partner closely with RTL, architecture, physical design, and firmware teams
- Drive root-cause analysis of functional, performance, and integration issues
- Support gate-level, timing-aware, and power-aware simulations as required
- Partner and support emulation and post silicon validation of the ASIC design
Full-Chip & Pre-Silicon Validation
- Lead full-chip verification planning, execution, and closure
- Support emulation and acceleration environments where appropriate
- Ensure clean handoff to silicon bring-up teams with high confidence in design correctness
Execution Discipline & Technical Leadership
- Establish and enforce verification checklists and quality gates
- Track verification progress and risk, proactively escalating issues
- Lead by technical authority and hands-on contribution rather than coordination alone
- Continuously improve verification methodology, infrastructure, and best practices
Qualifications
- Strong hands-on experience in ASIC design verification
- Proven track record of taking at least one complex ASIC to tape-out with direct verification ownership
- Deep expertise in SystemVerilog and UVM-based verification methodologies
- Strong understanding of ASIC design and verification flows, including simulation, coverage, and debug
- Experience with block-level through full-chip verification and integration
- Ability to drive execution in ambiguous, fast-paced startup environments
- Excellent communication skills and ability to collaborate across disciplines
Nice to Have
- Networking ASIC verification experience (Ethernet-based systems preferred)
- Experience with gate-level, timing-aware, and low-power verification
- Familiarity with high-speed interfaces and chip-to-chip interconnects
- Experience with emulation, acceleration, or FPGA-based validation
- Post-silicon debug experience and RTL-to-silicon correlation
Why Join Us?
At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
Notice to Recruiting Agencies
Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.
See All 41 Asic Verification Engineer Jobs in California
Find roles in California that match your experience and apply in just a few clicks.
Find JobsAsic Verification Engineer Jobs by City in California
Where California roles are concentrated, by current openings.
Asic Verification Engineer Job Market in California
A snapshot from current California openings, updated as new roles post.
Who's Hiring
- Google10

- Meta3

- Cisco3

- Nokia3

- Qualcomm3

Top Industries Hiring
- Technology & Software
- Electronics & Hardware
- Telecommunications
- Artificial Intelligence
What California Employers Look For
The qualifications that appear most often in asic verification engineer jobs across California.
- Bachelor's or master's degree in electrical engineering, computer engineering, or computer science
- Proficiency in SystemVerilog and UVM-based testbench development for block and chip-level verification
- Experience with functional coverage closure and constrained-random verification methodology
- Familiarity with simulation tools such as VCS, Xcelium, or Questa in a Linux environment
- Ability to write and debug RTL assertions using SVA for formal or dynamic verification
- Experience with scripting languages such as Python or Perl for test automation and regression management
Asic Verification Engineer Jobs in California: Frequently Asked Questions
How do you become a asic verification engineer in California?
Asic verification engineering in California does not require a state-issued license, so the path runs through education and demonstrated technical skills. Most California employers expect at least a bachelor's degree in electrical engineering, computer engineering, or a closely related field, with a master's degree increasingly preferred for roles in advanced nodes. Building hands-on experience with SystemVerilog, UVM, and industry simulation tools through coursework, internships, or open-source projects is the most direct way to enter California's semiconductor hiring pipeline.
How much do asic verification engineers make in California?
Asic verification engineers in California earn a median of about $160,520 a year, based on May 2025 Bureau of Labor Statistics wage data, ranging from around $97,140 for the lowest 10% to over $225,400 for the top 10%. Pay rises with experience, specialty, and employer.
Which companies hire asic verification engineers in California?
Employers hiring asic verification engineers in California right now include Google, Meta, and Cisco, based on current listings on Migrate Mate as of September 2026. California's dense concentration of fabless semiconductor companies, consumer electronics OEMs, and automotive chip developers means demand is spread across both large established names and well-funded design startups, particularly in the San Jose and San Diego corridors.
Which California cities have the most asic verification engineer jobs?
Sunnyvale, San Jose, and Santa Clara have the most asic verification engineer openings in California. The Silicon Valley corridor anchors demand through its dense cluster of fabless chip companies, EDA vendors, and consumer electronics headquarters, while San Diego draws significant hiring from Qualcomm's large local presence and a growing automotive and 5G silicon ecosystem.
Are there remote asic verification engineer jobs in California?
Yes, but they're less common than in purely software-focused roles, since ASIC verification regularly requires access to internal simulation infrastructure, licensed EDA toolchains, and lab hardware. About 44% of asic verification engineer openings tied to California are remote or hybrid as of September 2026, with hybrid arrangements more prevalent than fully remote. Tasks most amenable to remote work include testbench development, scripting, and coverage analysis rather than bringup and debug work.
How can I get hired as a asic verification engineer in California with little or no experience?
The most realistic entry path is a master's program at a California engineering school, such as UC San Diego, UC Santa Cruz, or San Jose State, where curriculum projects and industry-linked labs provide the SystemVerilog and UVM exposure California employers expect. Large California semiconductor companies including Qualcomm and Broadcom run structured internship and new-graduate rotational programs that regularly convert to full-time verification roles. Candidates who build a public portfolio demonstrating functional coverage closure or a complete UVM environment on an open-source core significantly improve their standing against more experienced applicants.
Where can I find and apply to asic verification engineer jobs in California?
You can find and apply to asic verification engineer jobs in California on Migrate Mate, which lists current California openings updated in real time. Search the listings below to see roles that match your experience level and location preference, then apply directly to the ones that fit.
See All 41 Asic Verification Engineer Jobs in California
Find roles in California that match your experience and apply in just a few clicks.
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