Asic Verification Engineer Jobs in San Jose, CA
Asic Verification Engineer jobs in San Jose are concentrated in North San Jose, the Alviso corridor, and downtown's tech core, driven by the semiconductor and EDA firms headquartered there. Employers hiring right now include Cisco, Nokia, and AMD. Find a role that fits below and apply directly.
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Meet the Team
The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry.We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team,we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Your Impact
As an ASIC Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You will collaborate closely with verification engineers, designers, hardware, andothercross-functional teams to verify the ASIC in simulation, in emulation, and during ASIC bring-up to help guarantee seamless integration andoptimal performance of Cisco’s hardware platforms. You will:
- Maintaining existing DV environments and enhancing them
- Construct test bench including scoreboard, agents, sequencers, and monitors for new blocks
- Write test plan, develop test cases, debug regressionfailures and drive to module verification closure
- Ensuring complete verification coverage through implementation and review of code and functional coverage
- ABachelor's degree (completed within the past3 years or expected to be completed within the next12 months).
- Qualifying education and work experience should be in ASIC Design, DesignVerification, or a related field.
- Qualifying education and work experience should be inASIC Engineering,Verification ora related field. 
- Experience with System Verilog and UVMmethodology.
- Experience with scripting using Perl and/or Python.
- Experience using UVM andSystemVerilog for ASIC verification and verifying complex blocks and/or clusters within ASICs.
- Experience with functional coverage and constrained random DV environments.
- Experience in verifying complex blocks,clusters and top level forSoC.
- Experience with Veloce/HAPS.
- Experience building test benches from scratch, including experience inSystemVerilog constraints, structures, and classes.
- Effective verbal and written communication skills.
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:
- 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
- Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
- Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
- 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
- Additional paid time away may be requested to deal with critical or emergency issues for family members
- Optional 10 paid days per full calendar year to volunteer
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:
- .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
- 1.5% of incentive target for each 1% of attainment between 50% and 75%;
- 1% of incentive target for each 1% of attainment between 75% and 100%; and
- Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
The applicable full salary ranges for this position, by specific state, are listed below:
New York City Metro Area:
$107,800.00 - $157,400.00Non-Metro New York state& Washington state:
$94,800.00 - $140,000.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
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Who's Hiring
- Cisco12

- Nokia12

- AMD4

- Axiado4

- Sambanova4S
Top Industries Hiring
- Electronics & Hardware
- Telecommunications
Asic Verification Engineer Jobs in San Jose: Frequently Asked Questions
How do I get a asic verification engineer job in San Jose?
Target the semiconductor IP, EDA software, and systems-on-chip teams concentrated in North San Jose and the Great America Parkway corridor. Employers in those clusters hire verification engineers with UVM methodology experience, SystemVerilog fluency, and exposure to functional coverage closure. Candidates who can show tape-out contributions or prior internships with chip design teams stand out in this market.
Which companies hire asic verification engineers in San Jose?
Employers hiring asic verification engineers in San Jose right now include Cisco, Nokia, and AMD, based on current listings on Migrate Mate as of November 2026. San Jose's hiring base skews heavily toward established semiconductor IP houses, fabless chip designers, and EDA tool vendors with large local engineering headcounts.
Are there remote asic verification engineer jobs in San Jose?
Yes, though with limits: asic verification work requires lab access for bring-up and hardware-in-the-loop testing, so fully remote roles are uncommon compared to purely software-focused positions. About 33% of asic verification engineer openings tied to San Jose are remote or hybrid as of November 2026, with hybrid arrangements most common. Simulation-heavy regression and coverage analysis work is the portion most likely to be done off-site.
How can I get a asic verification engineer job in San Jose with little or no experience?
The most realistic entry path is through a junior or associate verification engineer role at one of San Jose's mid-size fabless companies, which tend to hire new graduates more consistently than larger firms. Internships at local EDA vendors or chip startups near North First Street are another strong foothold. Building a portfolio of UVM testbench projects and contributing to open-source RISC-V verification environments helps candidates compete against more experienced applicants.
Which industries hire the most asic verification engineers in San Jose?
Most asic verification engineer openings in San Jose sit in Electronics & Hardware and Telecommunications, per current listings on Migrate Mate as of November 2026. San Jose's role as the geographic center of Silicon Valley means semiconductor design, EDA tools, and communications hardware companies maintain their largest engineering teams here, sustaining consistent demand for verification talent.
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