Mid Level Design Verification Engineer Jobs
Mid level design verification engineer jobs go to engineers ready to own verification plans end to end, mentor junior colleagues, and drive closure decisions with limited oversight. Across on-site, hybrid, and remote settings in Technology & Software, Electronics & Hardware, and Artificial Intelligence, employers like Etched, Google, and NVIDIA are competing for engineers at this level now.
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SUMMARY
Did you know that Apple is hiring analog & mixed signal verification engineers? We are looking for engineers that are enthusiastic to find bugs! You have the opportunity to work with a creative team to craft test plans and enable production-quality first silicon. As a member of the analog and mixed signal verification team, you will be working with specialists for full-chip verification of the state of the art mixed-signal systems used in Apple’s world-leading products!
DESCRIPTION
In this role, you will be responsible for ensuring high quality silicon for IC chips and IPs. Daily work involves verification of mixed signal IC designs using a combination of analog circuits and RTL in the same simulation. Responsibilities include all phases of pre-silicon verification from early discussions with architects, reviewing specifications, writing verification plans, running simulations, triaging issues, and reviewing results with the team.
- Develop detailed test and coverage plans based on IC specifications.
- Completion of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out.
- Develop verification methodology suitable for the IP, ensuring scalability and portability.
- Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage.
- Sign-off mixed signal designs in preparation for tapeout.
MINIMUM QUALIFICATIONS
- BS and a minimum of 3 years of relevant industry experience.
PREFERRED QUALIFICATIONS
- Ability to verify analog/mixed-signal designs in a collaborative team environment.
- Proficient in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
- Familiarity with authoring analog assertion checks to catch bugs.
- Capability to identify failure mechanisms and review verification results in analog IC designs.
- Ability to write test plans, present results, and communicate clearly with multi-functional teams.
- Comfortable with running simulations through compute clusters while optimizing simulation and wall time.
- Understanding of both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, bandgaps, data converters, and/or clock generators.
- Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, gate level simulations.
- Experience developing scalable and portable test benches.
- A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.
- Your familiarity with analog behavioral models is also a plus.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Apple accepts applications to this posting on an ongoing basis.
SUMMARY
Did you know that Apple is hiring analog & mixed signal verification engineers? We are looking for engineers that are enthusiastic to find bugs! You have the opportunity to work with a creative team to craft test plans and enable production-quality first silicon. As a member of the analog and mixed signal verification team, you will be working with specialists for full-chip verification of the state of the art mixed-signal systems used in Apple’s world-leading products!
DESCRIPTION
In this role, you will be responsible for ensuring high quality silicon for IC chips and IPs. Daily work involves verification of mixed signal IC designs using a combination of analog circuits and RTL in the same simulation. Responsibilities include all phases of pre-silicon verification from early discussions with architects, reviewing specifications, writing verification plans, running simulations, triaging issues, and reviewing results with the team.
- Develop detailed test and coverage plans based on IC specifications.
- Completion of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out.
- Develop verification methodology suitable for the IP, ensuring scalability and portability.
- Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage.
- Sign-off mixed signal designs in preparation for tapeout.
MINIMUM QUALIFICATIONS
- BS and a minimum of 3 years of relevant industry experience.
PREFERRED QUALIFICATIONS
- Ability to verify analog/mixed-signal designs in a collaborative team environment.
- Proficient in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
- Familiarity with authoring analog assertion checks to catch bugs.
- Capability to identify failure mechanisms and review verification results in analog IC designs.
- Ability to write test plans, present results, and communicate clearly with multi-functional teams.
- Comfortable with running simulations through compute clusters while optimizing simulation and wall time.
- Understanding of both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, bandgaps, data converters, and/or clock generators.
- Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, gate level simulations.
- Experience developing scalable and portable test benches.
- A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.
- Your familiarity with analog behavioral models is also a plus.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Apple accepts applications to this posting on an ongoing basis.
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Mid Level Design Verification Engineer Jobs: Frequently Asked Questions
How do I get a mid level design verification engineer job?
Position yourself around ownership, not just execution. Highlight verification environments you led, coverage models you defined, and bugs you caught before tape-out. Employers at this level want to see that you can take a block or subsystem from plan to sign-off with minimal hand-holding. Tailor your resume to show measurable outcomes, such as closure rates or coverage improvements, rather than a list of tools you have used.
Which companies hire mid level design verification engineers?
Companies hiring mid level design verification engineers right now include Etched, Google, and NVIDIA, based on current listings on Migrate Mate as of November 2026. Hiring at this level covers semiconductor companies, fabless chip designers, automotive electronics suppliers, and large consumer electronics firms that run continuous verification programs across multiple product lines.
Are there remote mid level design verification engineer jobs?
Yes, though on-site access to lab equipment and EDA tool licenses keeps many roles tied to a physical location. About 13% of mid level design verification engineer openings are remote or hybrid as of November 2026, with hybrid arrangements being most common at larger companies where simulation work can be done off-site while block reviews and debug sessions happen in person.
How do I move up to a mid level design verification engineer role?
The move from entry level to mid level comes from deepening your ownership over time. Start by mastering one verification methodology, then take on full block ownership rather than assigned test cases. Build fluency in coverage closure, constrained-random environments, and formal property writing. Demonstrating that you caught a meaningful architectural issue or drove a coverage campaign to sign-off independently signals that you are ready to work at mid level scope.
Which industries hire the most mid level design verification engineers?
Mid Level design verification engineer roles concentrate in Technology & Software, Electronics & Hardware, and Artificial Intelligence, based on current listings on Migrate Mate as of November 2026. Those sectors drive demand because they run high-complexity, high-reliability silicon programs where thorough pre-silicon verification directly reduces costly post-production respins and recall risk.