Design Verification Engineer Jobs in Oregon
Design Verification Engineer jobs in Oregon concentrate in semiconductor design, consumer electronics, and advanced computing hardware, with Hillsboro, Portland, and Beaverton forming the state's densest hiring corridor. Intel, Lattice Semiconductor, and Cadence Design Systems maintain established engineering operations in the region and hire across the full seniority range from early-career verification engineers to principal-level specialists. The most in-demand specialties are functional verification using SystemVerilog and UVM, FPGA validation, and SoC-level verification. Find a role that fits below and apply directly.
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Showing 5 of 7+ Design Verification Engineer jobs
Job Details:
Job Description:
Intel is a global leader in technology innovation, dedicated to creating products that transform industries and improve lives worldwide. We design and manufacture advanced silicon solutions that power the digital world. Our commitment to excellence drives us to push the boundaries of technology and deliver cutting-edge solutions that meet the needs of our customers. If you are passionate about innovation and eager to contribute to transformative projects, Intel is the place for you.
Join us at Intel and be a part of a team that is shaping the future of power delivery technology.
The role’s responsibilities include but are not limited to:
Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to mixed signal microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology.
Qualifications:
You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience - OR -
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience
All years of experience must be directly applied in the following technical areas:
Digital logic experience.
VHDL/Verilog/System Verilog.
Testbench component development (preferably in OVM/UVM), and design debugging skills.
Preferred Qualifications:
7+ years of related experience
Analog debug skills
Real number (current, voltage) simulation modeling and debug skills
Relevant experience can be obtained through schoolwork, classes, and project work, internships, military training and/or work experience.
Job Type:
Experienced HireShift:
Shift 1 (United States of America)Primary Location:
US, Oregon, HillsboroAdditional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Job Details:
Job Description:
Intel is a global leader in technology innovation, dedicated to creating products that transform industries and improve lives worldwide. We design and manufacture advanced silicon solutions that power the digital world. Our commitment to excellence drives us to push the boundaries of technology and deliver cutting-edge solutions that meet the needs of our customers. If you are passionate about innovation and eager to contribute to transformative projects, Intel is the place for you.
Join us at Intel and be a part of a team that is shaping the future of power delivery technology.
The role’s responsibilities include but are not limited to:
Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to mixed signal microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology.
Qualifications:
You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience - OR -
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience
All years of experience must be directly applied in the following technical areas:
Digital logic experience.
VHDL/Verilog/System Verilog.
Testbench component development (preferably in OVM/UVM), and design debugging skills.
Preferred Qualifications:
7+ years of related experience
Analog debug skills
Real number (current, voltage) simulation modeling and debug skills
Relevant experience can be obtained through schoolwork, classes, and project work, internships, military training and/or work experience.
Job Type:
Experienced HireShift:
Shift 1 (United States of America)Primary Location:
US, Oregon, HillsboroAdditional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.See All 7 Design Verification Engineer Jobs in Oregon
Find roles in Oregon that match your experience and apply in just a few clicks.
Find JobsDesign Verification Engineer Jobs by City in Oregon
Where Oregon roles are concentrated, by current openings.
Design Verification Engineer Job Market in Oregon
A snapshot from current Oregon openings, updated as new roles post.
Who's Hiring
Top Industries Hiring
- Electronics & Hardware
- Technology & Software
- Artificial Intelligence
What Oregon Employers Look For
The qualifications that appear most often in design verification engineer jobs across Oregon.
- Bachelor's or master's degree in electrical engineering, computer engineering, or a related field
- Proficiency in SystemVerilog and Universal Verification Methodology for testbench development
- Experience writing and executing constrained-random and directed test plans for digital logic
- Familiarity with simulation tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa
- Ability to analyze coverage metrics and close functional coverage gaps independently
- Collaboration with RTL designers and firmware teams across full chip bring-up cycles
Design Verification Engineer Jobs in Oregon: Frequently Asked Questions
How do you become a design verification engineer in Oregon?
A bachelor's degree in electrical engineering, computer engineering, or computer science is the standard starting point for this role in Oregon, and many senior positions require or strongly prefer a master's degree. Oregon does not issue a state license specific to design verification engineers. Employers in the Hillsboro and Portland corridor typically expect hands-on experience with hardware description languages, simulation environments, and structured verification methodologies, which candidates build through coursework, internships, or adjacent roles in digital design.
Which companies hire design verification engineers in Oregon?
Oregon design verification engineer roles are posted by Apple, Google, and Intel and others right now, based on current listings on Migrate Mate as of August 2026. The heaviest concentration of postings is tied to Oregon's semiconductor corridor, where chip design activity from established fabs and IP companies generates consistent verification demand.
Which Oregon cities have the most design verification engineer jobs?
Beaverton, Portland, and Hillsboro account for the largest share of design verification engineer openings in Oregon. Hillsboro leads because Intel's large campus there drives substantial chip verification hiring, while Portland and Beaverton attract openings from semiconductor IP firms, EDA vendors, and hardware-focused startups clustered in the metro's west-side technology corridor.
Are there remote design verification engineer jobs in Oregon?
Yes, but they're limited compared to purely software roles, because much of the work involves lab access, simulation server environments, and hardware bring-up that require on-site presence at key milestones. About 50% of design verification engineer openings tied to Oregon are remote or hybrid as of August 2026, reflecting a modest but real subset of positions. Roles focused on testbench development, coverage analysis, and specification review are the most likely to support remote arrangements.
How can I get hired as a design verification engineer in Oregon with little or no experience?
The most realistic entry path is an internship or co-op with one of Oregon's semiconductor employers during a bachelor's or master's program, since companies like Intel in Hillsboro run structured university recruiting programs that convert to full-time offers. Candidates without internship experience can move laterally from adjacent roles in digital design, FPGA development, or embedded software testing, where verification skills overlap. Building a portfolio of SystemVerilog testbenches and UVM environments through coursework or open-source projects gives applicants a concrete edge when applying to new-grad positions.
Where can I find and apply to design verification engineer jobs in Oregon?
You can find and apply to design verification engineer jobs in Oregon on Migrate Mate, which lists current Oregon openings updated regularly. Search the listings for roles that match your experience level and target location, then apply directly to the ones that fit.
See All 7 Design Verification Engineer Jobs in Oregon
Find roles in Oregon that match your experience and apply in just a few clicks.
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