Mid Level Ic Design Engineer Jobs
Mid level ic design engineer jobs go to engineers ready to own circuit blocks end to end, make design trade-off decisions with limited oversight, and guide junior colleagues through implementation challenges. Hiring runs across Science & Research, Electronics & Hardware, and Technology & Software, with on-site, hybrid, and remote roles open at employers like NEURALINK, Nokia, and Neuralink competing for engineers at this level now.
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About GlobalFoundries:
GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets.
Summary of Role:
GlobalFoundries is seeking a Senior Digital IC Design Engineer to develop advanced digital and mixed-signal integrated circuits and reusable IP for emerging semiconductor applications, including cryogenic CMOS and quantum systems. This role will drive designs from architecture and RTL through physical implementation, tapeout, and silicon validation while partnering closely with technology, PDK, modeling, verification, and test teams.
Essential Responsibilities:
- Design and develop digital CMOS circuits, digital subsystems, and reusable IP for advanced semiconductor applications, including control, interface, timing, calibration, and signal-processing functions.
- Own digital IC development from microarchitecture and RTL implementation through functional verification, synthesis, timing closure, physical implementation, tapeout, and silicon validation.
- Develop and execute verification strategies using simulation, assertions, coverage, and regression methodologies to ensure functional correctness and robust operation across intended use conditions.
- Perform and support synthesis, static timing analysis, clock/reset design, power analysis, design-for-test, and physical implementation activities, including post-layout verification and design signoff.
- Optimize digital architectures for power, performance, area, reliability, and operating-temperature requirements, including cryogenic operating conditions where applicable.
- Collaborate with PDK, device modeling, technology, analog, layout, and EDA teams to evaluate digital design methodology, libraries, timing models, design rules, and implementation flows for emerging technologies.
- Define silicon test and characterization requirements, analyze measured data, debug digital functionality and timing issues, and correlate silicon behavior with pre-silicon models and simulations.
- Lead technical design reviews, document design methodology and results, mentor engineers, and collaborate with cross-functional internal and external teams to enable customer and technology solutions.
Other Responsibilities:
- Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
Required Qualifications:
- Education - Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Microelectronics, or a related field.
- Experience - Minimum 5 years of relevant digital integrated circuit or ASIC design experience.
- Skills - Demonstrated experience with RTL design and verification using Verilog, SystemVerilog, VHDL, or equivalent hardware-description languages.
- Skills - Experience with ASIC design flows including synthesis, static timing analysis, clock/reset methodology, design-for-test, physical implementation, timing closure, and signoff.
- Skills - Strong understanding of synchronous digital design, clock-domain crossing, reset-domain crossing, low-power design concepts, and PVT-related timing behavior.
- Skills - Proficiency with industry-standard digital design, verification, implementation, and analysis tools and the ability to independently debug complex pre-silicon and silicon issues.
- Travel - Up to 10%.
- Fluency in English Language - written & verbal.
Preferred Qualifications:
- Education - Master’s degree or PhD in Electrical Engineering, Computer Engineering, Microelectronics, or a related field.
- Experience - Experience with cryogenic CMOS, quantum-control electronics, mixed-signal SoCs, high-speed interfaces, or other advanced digital applications.
- Skills - Experience with digital standard-cell libraries, characterization, timing/power models, or digital-flow enablement for new semiconductor technologies.
- Skills - Familiarity with formal verification, UVM, FPGA prototyping, DFT/scan, memory interfaces, processors, DSP, serializers/deserializers, or high-speed digital architectures.
- Skills - Experience with silicon bring-up, characterization, and correlation of measured results to RTL, gate-level, timing, or power models.
- Skills - Familiarity with design and verification automation using Python, Tcl, Perl, or equivalent scripting languages.
- Project management skills - i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
- Strong written and verbal communication skills.
- Strong planning & organizational skills.
Expected Salary Range
$98,000.00 - $202,000.00
The exact Salary will be determined based on qualifications, experience and location.
If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.
An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.
GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.
All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law.
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Mid Level Ic Design Engineer Jobs: Frequently Asked Questions
How do I get a mid level ic design engineer job?
Position yourself around ownership, not just contribution. Highlight circuits or subsystems you drove from specification through tape-out, tools you selected independently, and design decisions you defended in review. Concrete outcomes matter: power reduction achieved, area saved, yield improvement. Tailor your resume to the process node and design domain each employer lists, and bring a portfolio or presentation that shows your reasoning, not just the results.
Which companies hire mid level ic design engineers?
Companies hiring mid level ic design engineers right now include NEURALINK, Nokia, and Neuralink, based on current listings on Migrate Mate as of November 2026. At this level, hiring covers semiconductor fabless firms, integrated device manufacturers, and large technology companies building custom silicon for compute, communications, and mixed-signal applications.
Are there remote mid level ic design engineer jobs?
Yes, though ic design roles are more lab- and tool-dependent than many engineering disciplines. About 0% of mid level ic design engineer openings are remote or hybrid as of November 2026, concentrated in digital design, verification, and physical design automation where full-stack EDA tool access can be provided through secure cloud or VPN environments rather than on-site workstations.
How do I move up to a mid level ic design engineer role?
Progression into mid level comes from accumulating ownership, not just years. Engineers who get there focus on running a full design block independently, not just implementing assigned tasks. Building fluency in simulation, layout review, and sign-off flows, then volunteering for cross-functional work with verification or physical design teams, signals readiness. Measurable contributions to tape-outs and documented design decisions carry the most weight in promotion conversations.
Which industries hire the most mid level ic design engineers?
Mid Level ic design engineer roles concentrate in Science & Research, Electronics & Hardware, and Technology & Software, based on current listings on Migrate Mate as of November 2026. Those sectors drive demand because they are actively developing proprietary chips for AI acceleration, automotive safety systems, wireless connectivity, and high-speed data infrastructure, all of which require sustained mid-level engineering depth rather than just entry-level support.