Physical Design Engineer Jobs in Austin, TX
Physical Design Engineer jobs in Austin, Texas are in high demand, concentrated in the Domain, the Semiconductor District along Research Boulevard, and the South Austin tech corridor across chip design, semiconductor IP, and electronics manufacturing. Employers hiring right now include Apple, Qualcomm, and NXP Semiconductors. Find a role that fits below and apply directly.
Find Physical Design Engineer JobsOverview
Open roles62
Top employerApple
Work type78% On-site
Top credentialBachelor's degree in electrical engineering
Companies hiring15
Showing 5 of 62+ Physical Design Engineer jobs
Physical Design Methodology Staff Engineer
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Added 2d ago
AMD
Physical Design Methodology Staff Engineer
Austin, Texas
Added 2d ago
Physical Design Engineer (PnR / PPA / Timing Closure)
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Wipro
Physical Design Engineer (PnR / PPA / Timing Closure)
Austin, Texas
Added 2d ago
Principal Physical Design Engineer / Physical Design – ACE US
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NXP Semiconductors
Principal Physical Design Engineer / Physical Design – ACE US
Austin, Texas
Added 2d ago
Director of SoC Implementation / Physical Design
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Added 3d ago
NXP Semiconductors
Director of SoC Implementation / Physical Design
Austin, Texas
Added 3d ago
Physical Design Engineer, Staff
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Added 3d ago
Qualcomm
Physical Design Engineer, Staff
Austin, Texas
Added 3d ago
Added 2d ago
Physical Design Methodology Staff Engineer
AMD·Austin, Texas
Job functions:
Master of Science
5,001-10,000 employees
Job Description
Overview:
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
Responsibilities:
Qualifications:
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
THE ROLE
We are seeking a Physical Design Methodology Staff Engineer to serve as the technical backbone of our high-performance core team. In this role, you will move beyond standard implementation to focus on the "how" of physical design. You will own the optimization of our EDA tool-chain, developing and refining the methodologies that enable our CPU cores to hit aggressive PPA (Power, Performance, and Area) targets. You will act as a power-user and flow-architect, bridging the gap between raw EDA tool capabilities and the complex requirements of GHz-class silicon.
THE PERSON
You are an EDA-centric engineer who views the design flow as a system to be tuned, automated, and perfected. You are not just a user of tools; you are an expert in how tool algorithms, constraints, and physical parameters interact to produce optimal silicon. If you are driven by the challenge of reducing turnaround time, improving design predictability, and pushing EDA tools to their absolute limits, you are the ideal candidate for this role.
KEY RESPONSIBILITIES
- Flow Architecture: Design, implement, and maintain end-to-end physical implementation flows (Synthesis through Signoff) that prioritize scalability, reproducibility, and high QoR.
- EDA Tool Optimization: Act as the primary interface with EDA vendors to drive tool adoption, evaluate new features, and troubleshoot complex tool-behavior issues.
- Methodology Development: Develop and deploy advanced scripting frameworks (Tcl/Python) to automate design space exploration, ECO implementation, and multi-corner timing closure.
- PPA Optimization: Systematically analyze and tune tool settings—including placement density, routing congestion management, and clock tree synthesis (CTS) strategies—to meet aggressive frequency and power targets.
- Signoff Integration: Build and refine automated signoff loops (STA, IR/EM, Physical Verification) to ensure high-confidence tape-outs with minimal iterations.
- Constraint Engineering: Develop and validate complex SDC constraints, ensuring that tool-driven optimizations are aligned with architectural intent and physical realities.
- Data-Driven Analysis: Utilize big-data approaches to analyze design metrics across multiple iterations, identifying trends in tool performance and implementing corrective methodology improvements.
PREFERRED EXPERIENCE
EDA & Methodology Expertise
- Tool Mastery: Expert-level proficiency in industry-standard physical design platforms (e.g., Synopsys Fusion Compiler/ICC2, Cadence Innovus).
- Scripting & Automation: Advanced Tcl/Python/Perl skills; proven ability to build custom tool wrappers, automated debug utilities, and flow-management scripts.
- Flow Customization: Experience in customizing tool-specific APIs to handle unique design challenges, such as custom cell integration or non-standard floorplanning requirements.
- QoR Tuning: Demonstrated success in "tuning the engine"—adjusting tool-specific switches, constraints, and optimization strategies to resolve timing, power, or congestion bottlenecks.
Technical Depth
- Advanced Node Implementation: Deep understanding of the physical effects at 7nm/5nm/3nm nodes and how to configure EDA tools to mitigate parasitic, crosstalk, and LDE (Layout Dependent Effect) issues.
- Signoff Methodology: Mastery of the signoff ecosystem (PrimeTime SI, RedHawk-SC, Voltus, Calibre); experience in building "push-button" signoff flows that minimize manual intervention.
- Clocking & Power Flows: Expertise in configuring advanced CTS methodologies and power-aware implementation flows (e.g., UPF/CPF-driven design, multi-Vt optimization).
- Constraint Management: Deep knowledge of MMMC (Multi-Mode Multi-Corner) environments and the ability to manage complex timing exceptions in high-frequency CPU designs.
ACADEMIC CREDENTIALS:
- MS or PhD in Electrical Engineering, Computer Engineering, or a related field (or equivalent industry experience).
LOCATION:
Austin, TX
This role is not eligible for visa sponsorship.
Qualifications:
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
AMD
Physical Design Methodology Staff Engineer
Austin, Texas
Added 2d ago5,001-10,000 employees
Job functions:
Master of Science
Job Description
Overview:
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
Responsibilities:
Qualifications:
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
THE ROLE
We are seeking a Physical Design Methodology Staff Engineer to serve as the technical backbone of our high-performance core team. In this role, you will move beyond standard implementation to focus on the "how" of physical design. You will own the optimization of our EDA tool-chain, developing and refining the methodologies that enable our CPU cores to hit aggressive PPA (Power, Performance, and Area) targets. You will act as a power-user and flow-architect, bridging the gap between raw EDA tool capabilities and the complex requirements of GHz-class silicon.
THE PERSON
You are an EDA-centric engineer who views the design flow as a system to be tuned, automated, and perfected. You are not just a user of tools; you are an expert in how tool algorithms, constraints, and physical parameters interact to produce optimal silicon. If you are driven by the challenge of reducing turnaround time, improving design predictability, and pushing EDA tools to their absolute limits, you are the ideal candidate for this role.
KEY RESPONSIBILITIES
- Flow Architecture: Design, implement, and maintain end-to-end physical implementation flows (Synthesis through Signoff) that prioritize scalability, reproducibility, and high QoR.
- EDA Tool Optimization: Act as the primary interface with EDA vendors to drive tool adoption, evaluate new features, and troubleshoot complex tool-behavior issues.
- Methodology Development: Develop and deploy advanced scripting frameworks (Tcl/Python) to automate design space exploration, ECO implementation, and multi-corner timing closure.
- PPA Optimization: Systematically analyze and tune tool settings—including placement density, routing congestion management, and clock tree synthesis (CTS) strategies—to meet aggressive frequency and power targets.
- Signoff Integration: Build and refine automated signoff loops (STA, IR/EM, Physical Verification) to ensure high-confidence tape-outs with minimal iterations.
- Constraint Engineering: Develop and validate complex SDC constraints, ensuring that tool-driven optimizations are aligned with architectural intent and physical realities.
- Data-Driven Analysis: Utilize big-data approaches to analyze design metrics across multiple iterations, identifying trends in tool performance and implementing corrective methodology improvements.
PREFERRED EXPERIENCE
EDA & Methodology Expertise
- Tool Mastery: Expert-level proficiency in industry-standard physical design platforms (e.g., Synopsys Fusion Compiler/ICC2, Cadence Innovus).
- Scripting & Automation: Advanced Tcl/Python/Perl skills; proven ability to build custom tool wrappers, automated debug utilities, and flow-management scripts.
- Flow Customization: Experience in customizing tool-specific APIs to handle unique design challenges, such as custom cell integration or non-standard floorplanning requirements.
- QoR Tuning: Demonstrated success in "tuning the engine"—adjusting tool-specific switches, constraints, and optimization strategies to resolve timing, power, or congestion bottlenecks.
Technical Depth
- Advanced Node Implementation: Deep understanding of the physical effects at 7nm/5nm/3nm nodes and how to configure EDA tools to mitigate parasitic, crosstalk, and LDE (Layout Dependent Effect) issues.
- Signoff Methodology: Mastery of the signoff ecosystem (PrimeTime SI, RedHawk-SC, Voltus, Calibre); experience in building "push-button" signoff flows that minimize manual intervention.
- Clocking & Power Flows: Expertise in configuring advanced CTS methodologies and power-aware implementation flows (e.g., UPF/CPF-driven design, multi-Vt optimization).
- Constraint Management: Deep knowledge of MMMC (Multi-Mode Multi-Corner) environments and the ability to manage complex timing exceptions in high-frequency CPU designs.
ACADEMIC CREDENTIALS:
- MS or PhD in Electrical Engineering, Computer Engineering, or a related field (or equivalent industry experience).
LOCATION:
Austin, TX
This role is not eligible for visa sponsorship.
Qualifications:
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
See All 62 Physical Design Engineer Jobs in Austin
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Find Physical Design Engineer JobsPhysical Design Engineer Job Market in Austin
Who's Hiring
- Apple18
- Qualcomm7
- NXP Semiconductors7
- NVIDIA4
- Marvell Technology4
Top Industries Hiring
- Electronics & Hardware17
- Technology & Software5
- Telecommunications1
- Aerospace & Defense1
- Law & Legal Services1
Physical Design Engineer Jobs in Austin: Frequently Asked Questions
How do I get a physical design engineer job in Austin?
Focus your search on Austin's semiconductor and chip design ecosystem, which is densest around the Domain and Research Boulevard corridor. Fabless chip companies, EDA tool vendors, and defense electronics firms are the most active local hirers. Candidates with hands-on experience in place-and-route tools like Innovus or ICC2, strong timing closure skills, and familiarity with advanced process nodes stand out in this market over generalist applicants.
Which companies hire physical design engineers in Austin?
Employers hiring physical design engineers in Austin right now include Apple, Qualcomm, and NXP Semiconductors, based on current listings on Migrate Mate as of September 2026. Austin's hiring base is a mix of large semiconductor firms with Austin design centers and smaller fabless startups that have relocated to the city in recent years.
Are there remote physical design engineer jobs in Austin?
Yes, though remote work is limited for this role because physical design engineering typically requires access to licensed EDA software, secure design environments, and close team collaboration on tapeouts. About 22% of physical design engineer openings tied to Austin are remote or hybrid as of September 2026, with the remote share concentrated in pre-tapeout verification and signoff review work rather than hands-on floorplanning or routing.
How can I get a physical design engineer job in Austin with little or no experience?
The most realistic entry path in Austin is a role on the physical verification or DRC/LVS team at one of the larger semiconductor design centers, where structured mentorship is more common than at startups. Austin-area employers also recruit from UT Austin's Cockrell School of Engineering and Texas A&M, so new graduates with relevant coursework in VLSI design have a clear on-ramp. Building familiarity with one major EDA toolchain and completing an academic or personal tapeout project gives candidates a concrete edge in interviews.
Which industries hire the most physical design engineers in Austin?
Most physical design engineer openings in Austin sit in Electronics & Hardware, Technology & Software, and Telecommunications, per current listings on Migrate Mate as of September 2026. Austin's growth as a semiconductor design hub, accelerated by major chip company expansions and a wave of fabless startups relocating from Silicon Valley, keeps demand in those sectors consistently high.
See All 62 Physical Design Engineer Jobs in Austin
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