Remote Design Verification Jobs
Remote design verification jobs are open across semiconductor, consumer electronics, and defense sectors at remote-first firms and distributed engineering teams, from entry-level positions to senior verification engineers and lead roles. Companies hiring remotely right now include ASML, K2 Space, and NVIDIA. See the openings below and apply to the ones that match your experience.
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Showing 5 of 7+ Remote Design Verification jobs
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.
The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.
With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.
The Role
We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon.
Responsibilities
- Develop and execute verification plans for block-level, subsystem-level, and full-chip environments.
- Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.
- Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.
- Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.
- Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.
- Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.
- Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.
- Participate in design reviews, microarchitecture discussions, and influence design-for-verification (DFV) best practices.
- Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers to ensure end-to-end coverage and test.
- Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis.
- Participate in ASIC team interviews.
- Drive advancement of DV methodologies and improvements.
- Manage external IP providers and verification partners when needed.
- Take lead on large and/or complex systems.
Qualifications
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
- 10+ years of experience in ASIC/SoC verification.
- Solid understanding of SystemVerilog, digital logic, RTL design, DFT, and hardware design and verification flows.
- Proficiency with several simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tools, and scripting languages (ex: Python, Perl, TCL).
- Experience with test planning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions.
- Experience with regression management, coverage analysis, revision control (ex: Git), CI/CD automation, and gate-level simulation.
- Experience with developing and integrating reference models.
- Experience with embedded processor-based designs and firmware/bare metal coding (ex: C, C++).
- Understanding of many industry-standard interfaces (ex: APB/AHB/AXI).
- Involvement in post-silicon validation planning and execution.
Nice to Have
- Experience with low power verification.
- Experience with analog behavioral models.
- Familiarity with physical design flows.
- Experience working in cross-functional, geographically distributed teams.
- Experience in space, telecom, or RF/digital mixed systems is a plus.
Compensation and Benefits:
- Base salary range for this role is $190,000 – $285,000 + equity in the company
- Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
- Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks
If you don't meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!
If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.
Export Compliance
As defined in the ITAR, "U.S. Persons" include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a "U.S. Person."
The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a "U.S. person" as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
Equal Opportunity
K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.
The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.
With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.
The Role
We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon.
Responsibilities
- Develop and execute verification plans for block-level, subsystem-level, and full-chip environments.
- Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.
- Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.
- Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.
- Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.
- Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.
- Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.
- Participate in design reviews, microarchitecture discussions, and influence design-for-verification (DFV) best practices.
- Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers to ensure end-to-end coverage and test.
- Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis.
- Participate in ASIC team interviews.
- Drive advancement of DV methodologies and improvements.
- Manage external IP providers and verification partners when needed.
- Take lead on large and/or complex systems.
Qualifications
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
- 10+ years of experience in ASIC/SoC verification.
- Solid understanding of SystemVerilog, digital logic, RTL design, DFT, and hardware design and verification flows.
- Proficiency with several simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tools, and scripting languages (ex: Python, Perl, TCL).
- Experience with test planning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions.
- Experience with regression management, coverage analysis, revision control (ex: Git), CI/CD automation, and gate-level simulation.
- Experience with developing and integrating reference models.
- Experience with embedded processor-based designs and firmware/bare metal coding (ex: C, C++).
- Understanding of many industry-standard interfaces (ex: APB/AHB/AXI).
- Involvement in post-silicon validation planning and execution.
Nice to Have
- Experience with low power verification.
- Experience with analog behavioral models.
- Familiarity with physical design flows.
- Experience working in cross-functional, geographically distributed teams.
- Experience in space, telecom, or RF/digital mixed systems is a plus.
Compensation and Benefits:
- Base salary range for this role is $190,000 – $285,000 + equity in the company
- Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
- Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks
If you don't meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!
If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.
Export Compliance
As defined in the ITAR, "U.S. Persons" include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a "U.S. Person."
The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a "U.S. person" as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
Equal Opportunity
K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
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Find JobsRemote Design Verification Job Market
Who's Hiring
Top Industries Hiring
- Technology & Software
- Electronics & Hardware
What Employers Look For
The qualifications that appear most often in remote design verification jobs.
- Bachelor's or master's degree in electrical engineering, computer engineering, or computer science
- Proficiency in SystemVerilog and UVM-based verification environments
- Experience with industry-standard simulators such as Cadence Xcelium, Synopsys VCS, or Mentor Questa
- Hands-on functional coverage closure and assertion-based verification on RTL designs
- Familiarity with formal verification tools such as JasperGold or VC Formal
- Understanding of AMBA protocols including AXI, AHB, or APB for interface-level verification
Tips for Your Remote Design Verification Job Search
Apply early to remote roles that fit
Migrate Mate lists remote design verification openings from across the country in one place, so you can find roles that match your stack and seniority and apply directly without sorting through unrelated postings.
Prove your async communication skills upfront
Remote verification teams depend on written handoffs, detailed bug reports, and self-documented test plans. Include a sample coverage report or a clear block-level verification summary in your application materials to show you can communicate complex results without a whiteboard.
Highlight your remote simulation environment setup
Remote employers want to know you can run UVM, SystemVerilog, or formal verification flows independently. Mention the EDA tools you use, whether you work in cloud-based or VPN-connected environments, and any experience configuring your own simulation infrastructure.
Prepare for async-first remote interviews
Many distributed verification teams open with a written technical screen or a take-home testbench exercise before any video call. Practice writing clear, concise explanations of your verification methodology and be ready to share and walk through your code over a screen-share session.
Remote Design Verification Jobs: Frequently Asked Questions
How do I get a remote design verification job?
Target companies with distributed hardware or silicon engineering teams, since those organizations are the most consistent remote hirers for this role. Remote employers screen heavily for self-direction, clear written communication, and proficiency with tools like UVM, SystemVerilog, and simulation environments you can run without on-site lab access. Demonstrating a completed verification project, a solid GitHub repository, or prior remote work on a distributed team gives you a real edge.
Which companies hire remote design verifications?
Remote design verification roles are posted by ASML, K2 Space, and NVIDIA and others right now, based on current remote listings on Migrate Mate as of November 2026. The strongest remote hirers tend to be remote-first semiconductor IP firms, fabless chip companies, and defense electronics contractors that run fully distributed verification teams.
Can you get a remote design verification job with no experience?
Yes, but remote entry-level design verification roles are harder to land because employers expect you to work independently from day one with minimal on-site mentorship. Smaller fabless startups and open-source silicon projects are the most accessible entry points. Showing a completed UVM testbench, contributing to an open-source verification effort, or earning a hardware verification certification can substitute for direct professional experience.
Do you need a degree for remote design verification jobs?
Usually, but a bachelor's degree in electrical engineering or computer engineering is the common baseline rather than a hard requirement. Remote employers increasingly weigh demonstrated skills, a portfolio of verification projects, and familiarity with industry-standard methodologies like UVM and functional coverage. Candidates who can show real results on a simulation project or a completed block-level verification plan often move forward regardless of degree status.
Which industries hire the most remote design verifications?
The sectors hiring the most remote design verifications are Technology & Software and Electronics & Hardware, based on current remote listings on Migrate Mate as of November 2026. Those industries rely on distributed verification teams because simulation and testbench development can be done entirely in cloud or VPN-connected EDA environments without requiring physical lab access.
See All 7 Remote Design Verification Jobs
Find roles that match your experience and apply in just a few clicks.
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