SoC Design Engineer Jobs
SoC Design Engineer jobs are open across semiconductor, consumer electronics, automotive, and defense industries, at every level from new-grad to principal, with specializations in RTL design, physical design, and design verification. See the openings below and apply to the ones that match your experience.
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Showing 5 of 112+ SoC Design Engineer jobs
Category Engineering Hire Type Employee Job ID 19125 Base Salary Range $281500-$422300 Remote Eligible No Date Posted 11/09/2026
Executive Director, SoC Physical Design
We Are
The Role
What You’ll Be Doing
- Build, grow, manage, and lead a cohesive, high-performing physical design organization across multiple sites and customer engagements.
- Own physical design strategy, planning, execution, and sign-off for complex SoCs, subsystems, IP, and HPC controller products.
- Be accountable for physical feasibility and implementation readiness of soft IP releases, with practical P&R validation across representative configurations and technology targets.
- Lead end-to-end physical implementation, including floor planning, hierarchical design, placement, clock tree synthesis, routing, timing closure, power optimization, physical verification, and tape-out readiness.
- Establish scalable physical design flows, methodology, quality standards, and sign-off criteria across the product configuration space.
- Drive timing closure, power optimization, congestion resolution, constraint quality, and implementation efficiency using Synopsys tool flows such as Fusion Compiler.
- Partner with architecture and RTL design teams to identify structural and design improvements required for physical success, providing clear and actionable technical direction.
- Collaborate with verification, pre-silicon, post-silicon, and emulation teams to ensure implementation requirements and design tradeoffs are addressed throughout the development lifecycle.
- Work directly with customers to understand requirements, define scope, assess feasibility, estimate effort, cost, schedule, and design complexity, and support implementation on their selected technology nodes.
- Support customers with floorplan development, P&R execution, design closure, and adoption of Synopsys tools, methodologies, and IP.
- Develop and maintain consistent physical implementation user guides for each product vertical, including constraints, recommended flows, methodology, and sign-off guidance.
- Interface with methodology, EDA tooling, application engineering, and product teams to drive improvements in tools, flows, automation, and engineering productivity.
- Review implementation results, reports, metrics, and deliverables; provide continuous feedback and corrective direction to improve quality and execution.
- Report program status, risks, dependencies, and recommendations to senior leadership, proactively resolving issues that could affect delivery.
- Mentor technical leaders and engineers, strengthen organizational capabilities, and establish a culture of technical excellence, accountability, collaboration, and continuous improvement.
- Partner with other Synopsys teams, including business-unit AEs and Sales, to broaden and deploy differentiated tool and IP solutions for customers.
- Ensure adherence to engineering quality standards, processes, and best practices across the organization.
The Impact You Will Have
- Ensure complex SoC and soft IP releases are physically feasible, implementation-ready, and capable of meeting demanding power, performance, area, quality, and schedule targets.
- Improve design readiness and physical implementation success across advanced ASIC technology nodes.
- Increase the quality and consistency of delivered constraints, implementation guidance, and sign-off criteria.
- Improve customer experience and success in floor planning, P&R, and design closure of Synopsys IP and SoC solutions.
- Drive architecture and RTL improvements based on real implementation data and physical design insight.
- Increase engineering productivity through scalable flows, automation, methodology, and stronger collaboration across design and implementation teams.
- Build a strong culture of ownership, teamwork, technical rigor, and predictable execution.
- Provide actionable technical and program insights that enable effective executive decision-making.
What You’ll Need
- BS/MS in Electronics, Electrical Engineering, or a related discipline, with extensive experience in ASIC/SoC development and physical design; approximately 20+ years of relevant semiconductor experience is preferred for this executive-level role.
- Deep expertise in physical design with a proven track record of hardening complex designs through tape-out readiness.
- Extensive hands-on knowledge of floor planning, placement, clock tree synthesis, routing, static timing analysis and timing closure, power optimization, hierarchical implementation, constraints, and physical sign-off.
- Strong experience with Synopsys physical implementation tool flows, including Fusion Compiler, or equivalent advanced-node implementation platforms.
- Strong understanding of ASIC development flows, SoC architecture, RTL design considerations, verification dependencies, and the stakeholders involved in successful silicon delivery.
- Demonstrated ability to evaluate physical feasibility and guide architecture and RTL teams toward implementation-friendly designs.
- Experience developing scalable flows, sign-off methodology, production-quality checks, and physical implementation guidance across multiple product configurations and technology nodes.
- Proven experience leading large, geographically distributed engineering teams and developing senior technical talent.
- Strong program and operational management experience, including planning, resource management, schedule ownership, risk management, and delivery across multiple concurrent programs.
- Experience working directly with customers on complex implementation challenges and supporting deployment across customer-selected technology nodes.
- Experience in one or more relevant markets such as high-performance computing, AI, automotive, consumer, aerospace and defense, or other advanced SoC domains.
- Excellent analytical, problem-solving, communication, presentation, and executive-influence skills.
Who You Are
- A strategic and technically credible leader who can operate effectively from executive-level planning through detailed engineering problem solving.
- Proactive, adaptable, resilient, and strongly results oriented.
- A collaborative leader who communicates with influence and creates accountability across organizational boundaries.
- Customer focused, with the judgment to balance technical quality, schedule, business priorities, and long-term product success.
- Passionate about developing people, improving engineering systems, and building teams that consistently deliver high-quality results.
The Team You’ll Be A Part Of
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can
Category Engineering Hire Type Employee Job ID 19125 Base Salary Range $281500-$422300 Remote Eligible No Date Posted 11/09/2026
Executive Director, SoC Physical Design
We Are
The Role
What You’ll Be Doing
- Build, grow, manage, and lead a cohesive, high-performing physical design organization across multiple sites and customer engagements.
- Own physical design strategy, planning, execution, and sign-off for complex SoCs, subsystems, IP, and HPC controller products.
- Be accountable for physical feasibility and implementation readiness of soft IP releases, with practical P&R validation across representative configurations and technology targets.
- Lead end-to-end physical implementation, including floor planning, hierarchical design, placement, clock tree synthesis, routing, timing closure, power optimization, physical verification, and tape-out readiness.
- Establish scalable physical design flows, methodology, quality standards, and sign-off criteria across the product configuration space.
- Drive timing closure, power optimization, congestion resolution, constraint quality, and implementation efficiency using Synopsys tool flows such as Fusion Compiler.
- Partner with architecture and RTL design teams to identify structural and design improvements required for physical success, providing clear and actionable technical direction.
- Collaborate with verification, pre-silicon, post-silicon, and emulation teams to ensure implementation requirements and design tradeoffs are addressed throughout the development lifecycle.
- Work directly with customers to understand requirements, define scope, assess feasibility, estimate effort, cost, schedule, and design complexity, and support implementation on their selected technology nodes.
- Support customers with floorplan development, P&R execution, design closure, and adoption of Synopsys tools, methodologies, and IP.
- Develop and maintain consistent physical implementation user guides for each product vertical, including constraints, recommended flows, methodology, and sign-off guidance.
- Interface with methodology, EDA tooling, application engineering, and product teams to drive improvements in tools, flows, automation, and engineering productivity.
- Review implementation results, reports, metrics, and deliverables; provide continuous feedback and corrective direction to improve quality and execution.
- Report program status, risks, dependencies, and recommendations to senior leadership, proactively resolving issues that could affect delivery.
- Mentor technical leaders and engineers, strengthen organizational capabilities, and establish a culture of technical excellence, accountability, collaboration, and continuous improvement.
- Partner with other Synopsys teams, including business-unit AEs and Sales, to broaden and deploy differentiated tool and IP solutions for customers.
- Ensure adherence to engineering quality standards, processes, and best practices across the organization.
The Impact You Will Have
- Ensure complex SoC and soft IP releases are physically feasible, implementation-ready, and capable of meeting demanding power, performance, area, quality, and schedule targets.
- Improve design readiness and physical implementation success across advanced ASIC technology nodes.
- Increase the quality and consistency of delivered constraints, implementation guidance, and sign-off criteria.
- Improve customer experience and success in floor planning, P&R, and design closure of Synopsys IP and SoC solutions.
- Drive architecture and RTL improvements based on real implementation data and physical design insight.
- Increase engineering productivity through scalable flows, automation, methodology, and stronger collaboration across design and implementation teams.
- Build a strong culture of ownership, teamwork, technical rigor, and predictable execution.
- Provide actionable technical and program insights that enable effective executive decision-making.
What You’ll Need
- BS/MS in Electronics, Electrical Engineering, or a related discipline, with extensive experience in ASIC/SoC development and physical design; approximately 20+ years of relevant semiconductor experience is preferred for this executive-level role.
- Deep expertise in physical design with a proven track record of hardening complex designs through tape-out readiness.
- Extensive hands-on knowledge of floor planning, placement, clock tree synthesis, routing, static timing analysis and timing closure, power optimization, hierarchical implementation, constraints, and physical sign-off.
- Strong experience with Synopsys physical implementation tool flows, including Fusion Compiler, or equivalent advanced-node implementation platforms.
- Strong understanding of ASIC development flows, SoC architecture, RTL design considerations, verification dependencies, and the stakeholders involved in successful silicon delivery.
- Demonstrated ability to evaluate physical feasibility and guide architecture and RTL teams toward implementation-friendly designs.
- Experience developing scalable flows, sign-off methodology, production-quality checks, and physical implementation guidance across multiple product configurations and technology nodes.
- Proven experience leading large, geographically distributed engineering teams and developing senior technical talent.
- Strong program and operational management experience, including planning, resource management, schedule ownership, risk management, and delivery across multiple concurrent programs.
- Experience working directly with customers on complex implementation challenges and supporting deployment across customer-selected technology nodes.
- Experience in one or more relevant markets such as high-performance computing, AI, automotive, consumer, aerospace and defense, or other advanced SoC domains.
- Excellent analytical, problem-solving, communication, presentation, and executive-influence skills.
Who You Are
- A strategic and technically credible leader who can operate effectively from executive-level planning through detailed engineering problem solving.
- Proactive, adaptable, resilient, and strongly results oriented.
- A collaborative leader who communicates with influence and creates accountability across organizational boundaries.
- Customer focused, with the judgment to balance technical quality, schedule, business priorities, and long-term product success.
- Passionate about developing people, improving engineering systems, and building teams that consistently deliver high-quality results.
The Team You’ll Be A Part Of
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can
See All 112+ SoC Design Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
Find SoC Design Engineer JobsSoC Design Engineer Job Market
Who's Hiring
- Apple60
- Qualcomm9
- Meta8
- Micron Technology4
- Intel Corporation3
Top Industries Hiring
- Electronics & Hardware
- Technology & Software
What Employers Look For
The qualifications that appear most often in SoC design engineer jobs.
- Bachelor's or Master's degree in electrical engineering, computer engineering, or a related field
- Proficiency in RTL design using SystemVerilog or Verilog at block or subsystem level
- Experience with industry-standard EDA tools such as Synopsys, Cadence, or Mentor
- Familiarity with ASIC design flow from specification through synthesis, place-and-route, and signoff
- Knowledge of low-power design techniques including clock gating, power domains, and UPF
- Experience with functional verification using UVM or constrained-random simulation methodologies
Tips for Your SoC Design Engineer Job Search
Tailor your resume to tapeout milestones
Hiring managers want to see chips you've taken from RTL to GDSII, not just tool familiarity. List each project by process node, your specific ownership, and whether it reached production. Vague experience with EDA tools won't stand out the way a completed tapeout will.
Highlight your process node experience clearly
Job postings frequently gate on specific nodes, like 7nm, 5nm, or 28nm. Put your node experience in a dedicated line near the top of your resume so it clears automated screening immediately. Burying it in a project description means it gets missed.
Apply early to roles that fit
Migrate Mate lists soc design engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.
Target postings by design domain, not just title
Roles labeled 'SoC engineer' can mean front-end RTL, back-end physical, or DFT. Read the requirements section for terms like synthesis, place-and-route, or scan insertion to confirm the domain matches your strongest skills before applying.
Prepare for logic design coding screens
Many interviews include a live RTL coding exercise in SystemVerilog or Verilog, often involving FSM design or pipelining. Practice writing synthesizable, lint-clean code under time pressure, not just simulation testbenches. Interviewers check for reset style, naming conventions, and clock domain awareness.
Negotiate relocation for lab-dependent roles
Physical design and silicon bring-up positions almost always require on-site access to lab equipment and test vehicles. If the posting doesn't mention relocation, ask directly in your first recruiter call, before getting deep into interviews for a role that won't accommodate remote work.
SoC Design Engineer Jobs: Frequently Asked Questions
Which companies are hiring the most soc design engineers?
The most active employers for soc design engineers right now are Apple, Qualcomm, and Meta, and the most openings are in California, Texas, and Oregon, based on current listings on Migrate Mate as of November 2026. Semiconductor companies, hyperscalers with custom silicon programs, and automotive chipmakers tend to post the highest volumes year-round.
How many soc design engineer jobs are remote?
About 21% of soc design engineer openings are fully remote or hybrid as of November 2026, reflecting the lab and tool-access demands of most hardware roles. Front-end RTL design and design verification positions tend to be the most amenable to remote or hybrid arrangements, while physical design and silicon bring-up roles typically require on-site presence.
How do you become a soc design engineer?
Start by earning a degree in electrical engineering, computer engineering, or a closely related discipline, with coursework in digital design, computer architecture, and VLSI. Build hands-on RTL skills in SystemVerilog through academic projects or open-source chip initiatives. Internships at semiconductor companies provide real tapeout exposure, and many engineers deepen specialization in one domain, such as physical design or verification, before moving into broader SoC integration roles.
Can you get a soc design engineer job with little experience?
Yes, entry-level soc design engineer roles exist, but you'll need to show concrete technical output, not just coursework. Contribute to an open-source RTL project, complete a personal FPGA design that demonstrates pipelining or bus protocol implementation, or publish a chip through a university shuttle program. Employers at this level screen for the ability to write clean, synthesizable RTL and understand basic timing concepts more than years of industry experience.
What does the soc design engineer interview process look like?
Most processes start with a recruiter screen focused on background and domain fit, followed by a technical phone round covering digital design concepts like clock domain crossing, metastability, and pipeline hazards. A live coding exercise in SystemVerilog or Verilog usually comes next, often requiring you to design an FSM or small datapath module. Final rounds typically include a system design discussion, a deep dive into a past project, and conversations with the hiring manager and team leads.
Where can I find and apply to soc design engineer jobs?
You can find and apply to soc design engineer jobs on Migrate Mate, which lists current openings from across the United States. Search for roles that match your domain, experience level, and location preference, then apply directly to each listing that fits.
See All 112+ SoC Design Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
Find SoC Design Engineer Jobs