STEM OPT Asic Verification Engineer Jobs
ASIC Verification Engineer roles qualify for the 24-month STEM OPT extension, giving you up to 36 months of F-1 work authorization. Your employer must be enrolled in E-Verify, and your degree in electrical engineering, computer engineering, or a related STEM field must map to an eligible CIP code. Start your job search with that filter in place.
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INTRODUCTION
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens.
Applications accepted until further notice.
Meet the Team
The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Your Impact
As an ASIC Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You will collaborate closely with verification engineers, designers, hardware, and other cross-functional teams to verify the ASIC in simulation, in emulation, and during ASIC bring-up to help guarantee seamless integration and optimal performance of Cisco’s hardware platforms. You will:
- Maintain existing DV environments and enhance them
- Construct test bench including scoreboard, agents, sequencers, and monitors for new blocks
- Write test plan, develop test cases, debug regression failures and drive to module verification closure
- Ensure complete verification coverage through implementation and review of code and functional coverage
MINIMUM QUALIFICATIONS
- A Bachelor's degree (completed within the past 3 years or expected to be completed within the next 12 months).
- Qualifying education and work experience should be in ASIC Design, Design Verification, or a related field.
- Qualifying education and work experience should be in ASIC Engineering, Verification or a related field.
- Experience with System Verilog and UVM methodology.
- Experience with scripting using Perl and/or Python.
PREFERRED QUALIFICATIONS
- Experience using UVM and System Verilog for ASIC verification and verifying complex blocks and/or clusters within ASICs.
- Experience with functional coverage and constrained random DV environments.
- Experience in verifying complex blocks, clusters and top level for SoC.
- Experience with Veloce/HAPS.
- Experience building test benches from scratch, including experience in System Verilog constraints, structures, and classes.
- Effective verbal and written communication skills.
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:
- 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
- Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
- Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
- 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
- Additional paid time away may be requested to deal with critical or emergency issues for family members
- Optional 10 paid days per full calendar year to volunteer
For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:
- .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
- 1.5% of incentive target for each 1% of attainment between 50% and 75%;
- 1% of incentive target for each 1% of attainment between 75% and 100%; and
- Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
The applicable full salary ranges for this position, by specific state, are listed below:
New York City Metro Area:
$107,800.00 - $157,400.00
Non-Metro New York state & Washington state:
$94,800.00 - $140,000.00
- For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
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Get Access To All JobsTips for Finding STEM OPT Authorization as an Asic Verification Engineer
Verify your CIP code before applying
Cross-reference your degree against the DHS STEM OPT designated degree list before targeting roles. Electrical Engineering (CIP 14.1001) and Computer Engineering (CIP 14.0901) both qualify, but a mismatch delays your extension application at the worst possible moment.
Screen employers for E-Verify enrollment upfront
Ask recruiters directly whether the company is enrolled in E-Verify before your first interview. An employer who isn't enrolled cannot legally onboard you for STEM OPT, and semiconductor firms without government contracts sometimes skip enrollment entirely.
Build an I-983 training plan around verification tasks
Your I-983 must tie your ASIC verification work, such as UVM testbench development or formal property checking, to specific learning objectives from your degree. Generic job descriptions get flagged by DSOs; map each deliverable to a course or competency.
Target fabless firms and EDA vendors with E-Verify histories
Use Migrate Mate to filter ASIC and semiconductor employers by E-Verify enrollment and OPT hiring history, so you're only investing time in companies whose compliance infrastructure can actually support your authorization from day one.
Negotiate your start date around DSO processing windows
Your DSO needs up to 10 business days to issue the STEM OPT I-20 after you submit your I-983. File your I-765 with USCIS no later than 90 days before your initial OPT end date to avoid any gap between authorizations during onboarding.
Confirm tool-chain experience matches the LCA job description
The Department of Labor's Labor Condition Application ties your authorized role to a specific job title and SOC code. If your offer letter lists SystemVerilog simulation but the LCA specifies a different scope, flag the discrepancy with your employer's HR team before signing.
Frequently Asked Questions
Does an ASIC Verification Engineer role qualify for the STEM OPT extension?
Yes, provided your degree is in an eligible field such as electrical engineering, computer engineering, or computer science, and it maps to a CIP code on the DHS STEM designated degree list. The role itself falls under SOC codes tied to electrical and electronics engineering, which USCIS recognizes as qualifying STEM occupations for the 24-month extension.
Why must my employer be enrolled in E-Verify for STEM OPT?
Federal regulations require any employer hiring a STEM OPT student to be actively enrolled in E-Verify, the DHS employment eligibility verification system. Without that enrollment, your employer cannot legally employ you under the STEM OPT extension, regardless of whether your degree or role qualifies. Always confirm E-Verify status before accepting an offer, not after.
What goes into the I-983 training plan for an ASIC verification role?
Your I-983 must describe specific learning objectives tied to your verification work, for example, how UVM methodology, constrained-random simulation, or formal verification connects to coursework from your degree program. Both you and your employer sign it, and your DSO must approve it before USCIS processes your I-765. Vague descriptions referencing only job duties without linking them to academic learning are commonly rejected.
How does cap-gap protection work if I'm transitioning from STEM OPT to H-1B?
If your employer files an H-1B visa petition on your behalf before your STEM OPT expires and you're selected in the lottery, cap-gap automatically extends your work authorization through September 30 of that fiscal year. You can continue working in your ASIC verification role without interruption during that bridge period, as long as your I-94 reflects the cap-gap extension and your employer remains E-Verify enrolled.
Where can I find ASIC Verification Engineer jobs where employers are already set up for STEM OPT?
Migrate Mate filters job listings by E-Verify enrollment and OPT hiring history, so you can focus your search on semiconductor and EDA employers who have already hired F-1 students before. That matters for ASIC verification roles specifically because smaller fabless firms often lack the HR infrastructure to onboard international students quickly, and pre-filtering saves significant time during a time-sensitive authorization window.