STEM OPT Asic Verification Engineer Jobs
ASIC Verification Engineer roles qualify for the 24-month STEM OPT extension, giving you up to 36 months of F-1 work authorization. Your employer must be enrolled in E-Verify, and your degree in electrical engineering, computer engineering, or a related STEM field must map to an eligible CIP code. Start your job search with that filter in place.
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INTRODUCTION
We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research.
Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing model, GPU deep learning. This new model - where deep neural networks are trained to recognize patterns from meaningful amounts of data - has shown to be deeply effective at solving the most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent interconnects for our mobile SoCs and GPUs. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
ROLE AND RESPONSIBILITIES
What you'll be doing:
- In this position, you will be responsible for verification of high-speed coherent interconnect design, architecture and golden models.
- You will be responsible for micro-architecture using sophisticated verification methodologies.
- As a member of our verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), complete test/coverage plans, and verify the correctness of the design. This role will collaborate with architects, designers, emulation, and silicon verification teams to accomplish your tasks.
BASIC QUALIFICATIONS
What we need to see:
- Bachelors or Master’s Degree (or equivalent experience)
- 3+ years of relevant verification experience.
- Experience in architecting test bench environments for unit level verification.
- Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies.
- Prior Design or Verification experience of Coherent high-speed interconnects.
- Knowledge of industry standard interconnect protocols like PCIE, CXL, CHI will be useful.
- Strong background developing TB's from scratch using SV and UVM methodology is desired.
- C++ programming language experience, scripting ability and an expertise in System Verilog.
- Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
- Strong debugging and analytical skills.
- Experienced communication and interpersonal skills are required. A history of mentoring junior engineers and interns a huge plus.
COMPENSATION
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until May 3, 2026. This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
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Get Access To All JobsTips for Finding STEM OPT Authorization as an Asic Verification Engineer
Verify your CIP code before applying
Cross-reference your degree against the DHS STEM OPT designated degree list before targeting roles. Electrical Engineering (CIP 14.1001) and Computer Engineering (CIP 14.0901) both qualify, but a mismatch delays your extension application at the worst possible moment.
Screen employers for E-Verify enrollment upfront
Ask recruiters directly whether the company is enrolled in E-Verify before your first interview. An employer who isn't enrolled cannot legally onboard you for STEM OPT, and semiconductor firms without government contracts sometimes skip enrollment entirely.
Build an I-983 training plan around verification tasks
Your I-983 must tie your ASIC verification work, such as UVM testbench development or formal property checking, to specific learning objectives from your degree. Generic job descriptions get flagged by DSOs; map each deliverable to a course or competency.
Target fabless firms and EDA vendors with E-Verify histories
Use Migrate Mate to filter ASIC and semiconductor employers by E-Verify enrollment and OPT hiring history, so you're only investing time in companies whose compliance infrastructure can actually support your authorization from day one.
Confirm tool-chain experience matches the LCA job description
The Department of Labor's Labor Condition Application ties your authorized role to a specific job title and SOC code. If your offer letter lists SystemVerilog simulation but the LCA specifies a different scope, flag the discrepancy with your employer's HR team before signing.
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Find Asic Verification Engineer JobsFrequently Asked Questions
Does an ASIC Verification Engineer role qualify for the STEM OPT extension?
Yes, provided your degree is in an eligible field such as electrical engineering, computer engineering, or computer science, and it maps to a CIP code on the DHS STEM designated degree list. The role itself falls under SOC codes tied to electrical and electronics engineering, which USCIS recognizes as qualifying STEM occupations for the 24-month extension.
Why must my employer be enrolled in E-Verify for STEM OPT?
Federal regulations require any employer hiring a STEM OPT student to be actively enrolled in E-Verify, the DHS employment eligibility verification system. Without that enrollment, your employer cannot legally employ you under the STEM OPT extension, regardless of whether your degree or role qualifies. Always confirm E-Verify status before accepting an offer, not after.
What goes into the I-983 training plan for an ASIC verification role?
Your I-983 must describe specific learning objectives tied to your verification work, for example, how UVM methodology, constrained-random simulation, or formal verification connects to coursework from your degree program. Both you and your employer sign it, and your DSO must approve it before USCIS processes your I-765. Vague descriptions referencing only job duties without linking them to academic learning are commonly rejected.
How does cap-gap protection work if I'm transitioning from STEM OPT to H-1B?
If your employer files an H-1B petition on your behalf before your STEM OPT expires and you're selected in the lottery, cap-gap automatically extends your work authorization through September 30 of that fiscal year. You can continue working in your ASIC verification role without interruption during that bridge period, as long as your I-94 reflects the cap-gap extension and your employer remains E-Verify enrolled.
Where can I find ASIC Verification Engineer jobs where employers are already set up for STEM OPT?
Migrate Mate filters job listings by E-Verify enrollment and OPT hiring history, so you can focus your search on semiconductor and EDA employers who have already hired F-1 students before. That matters for ASIC verification roles specifically because smaller fabless firms often lack the HR infrastructure to onboard international students quickly, and pre-filtering saves significant time during a time-sensitive authorization window.
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