STEM OPT Verification Engineer Jobs
Verification Engineer roles in chip design, FPGA validation, and hardware testing are a strong fit for F-1 students on STEM OPT. Your 24-month extension applies as long as your employer is enrolled in E-Verify and your degree aligns with the SOC code for the role. Electrical engineering, computer engineering, and computer science degrees commonly satisfy that requirement.
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Get Access To All JobsAbout SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.
Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.
Are you ready?
To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.
Job Description:
The Role
SiFive is looking for a Senior Design Verification Engineer to drive functional verification of high-performance CPU core units.
This role focuses on high-performance out-of-order core verification, with potential scope across areas such as Frontend, Midcore, Load-Store Unit, and Hardware Prefetch.
You will work closely with architecture, RTL, performance, and verification teams to ensure design intent is verified correctly, risks are identified early, and signoff quality is achieved with strong technical execution.
We are looking for an engineer who can independently own meaningful verification work, solve complex debug problems efficiently, and contribute reusable methodology and infrastructure to the broader CPU DV team.
Responsibilities
- Own verification planning and execution for assigned high-performance CPU core areas, from block-level verification through core-level integration.
- Create effective verification strategies and test plans based on CPU architecture and microarchitectural behavior.
- Develop and maintain robust verification environments, testbenches, checkers, scoreboards, assertions, stimulus, and coverage models.
- Define and execute directed and constrained-random tests that expose corner cases in branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazard handling, load/store ordering, memory consistency, and hardware prefetch behavior.
- Analyze failures, isolate root cause, and drive fixes across RTL, testbench infrastructure, assertions, and test content.
- Collaborate closely with architecture and design teams to review specifications, identify ambiguities early, and improve verification quality and debugability.
- Write functional coverage, analyze code and functional coverage, and close coverage gaps to ensure verification completeness and signoff quality.
- Contribute to reusable DV methodology, automation, and infrastructure that improve team productivity and verification quality across future core generations.
Minimum Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 3+ years of relevant experience in IP, CPU/core, or SoC functional verification, preferably with experience in CPU/core verification.
- Strong hands-on experience with SystemVerilog and UVM-based verification methodologies.
- Solid understanding of computer architecture and CPU microarchitecture fundamentals.
- Experience with test planning, testbench development, constrained-random verification, failure analysis, coverage analysis, and coverage closure.
- Strong debug skills and the ability to translate architectural intent into effective verification strategy and execution.
- Strong programming and scripting fundamentals for building scalable verification solutions.
Preferred Qualifications
- Direct experience with high-performance out-of-order core verification.
- Experience in one or more of the following areas: Frontend, Midcore, Load-Store Unit, memory ordering and consistency, or hardware prefetch verification.
- Familiarity with formal verification, emulation, or performance-oriented verification flows.
- Experience collaborating across architecture, performance, compiler, system verification, and software teams.
- Experience building reusable infrastructure and improving team-wide verification methodology.
What Success Looks Like
- Verification plans capture the real architectural and microarchitectural risks early and completely.
- Difficult CPU bugs are found early, debugged efficiently, and closed with durable solutions.
- Coverage quality and verification productivity improve meaningfully under your ownership.
- Architecture, design, and DV teams view you as a strong technical contributor for challenging high-performance CPU verification problems.
In addition to base pay, this role may be eligible for variable/incentive compensation and/or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States of America. Any offer of employment for this position is also contingent on the Company verifying that you are authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.
SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.
About SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.
Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.
Are you ready?
To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.
Job Description:
The Role
SiFive is looking for a Senior Design Verification Engineer to drive functional verification of high-performance CPU core units.
This role focuses on high-performance out-of-order core verification, with potential scope across areas such as Frontend, Midcore, Load-Store Unit, and Hardware Prefetch.
You will work closely with architecture, RTL, performance, and verification teams to ensure design intent is verified correctly, risks are identified early, and signoff quality is achieved with strong technical execution.
We are looking for an engineer who can independently own meaningful verification work, solve complex debug problems efficiently, and contribute reusable methodology and infrastructure to the broader CPU DV team.
Responsibilities
- Own verification planning and execution for assigned high-performance CPU core areas, from block-level verification through core-level integration.
- Create effective verification strategies and test plans based on CPU architecture and microarchitectural behavior.
- Develop and maintain robust verification environments, testbenches, checkers, scoreboards, assertions, stimulus, and coverage models.
- Define and execute directed and constrained-random tests that expose corner cases in branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazard handling, load/store ordering, memory consistency, and hardware prefetch behavior.
- Analyze failures, isolate root cause, and drive fixes across RTL, testbench infrastructure, assertions, and test content.
- Collaborate closely with architecture and design teams to review specifications, identify ambiguities early, and improve verification quality and debugability.
- Write functional coverage, analyze code and functional coverage, and close coverage gaps to ensure verification completeness and signoff quality.
- Contribute to reusable DV methodology, automation, and infrastructure that improve team productivity and verification quality across future core generations.
Minimum Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 3+ years of relevant experience in IP, CPU/core, or SoC functional verification, preferably with experience in CPU/core verification.
- Strong hands-on experience with SystemVerilog and UVM-based verification methodologies.
- Solid understanding of computer architecture and CPU microarchitecture fundamentals.
- Experience with test planning, testbench development, constrained-random verification, failure analysis, coverage analysis, and coverage closure.
- Strong debug skills and the ability to translate architectural intent into effective verification strategy and execution.
- Strong programming and scripting fundamentals for building scalable verification solutions.
Preferred Qualifications
- Direct experience with high-performance out-of-order core verification.
- Experience in one or more of the following areas: Frontend, Midcore, Load-Store Unit, memory ordering and consistency, or hardware prefetch verification.
- Familiarity with formal verification, emulation, or performance-oriented verification flows.
- Experience collaborating across architecture, performance, compiler, system verification, and software teams.
- Experience building reusable infrastructure and improving team-wide verification methodology.
What Success Looks Like
- Verification plans capture the real architectural and microarchitectural risks early and completely.
- Difficult CPU bugs are found early, debugged efficiently, and closed with durable solutions.
- Coverage quality and verification productivity improve meaningfully under your ownership.
- Architecture, design, and DV teams view you as a strong technical contributor for challenging high-performance CPU verification problems.
In addition to base pay, this role may be eligible for variable/incentive compensation and/or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States of America. Any offer of employment for this position is also contingent on the Company verifying that you are authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.
SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.
See all 182+ STEM OPT Verification Engineer Jobs
Sign up for free to unlock all listings, filter by visa type, and get alerts for new STEM OPT Verification Engineer Jobs.
Get Access To All JobsTips for Finding STEM OPT Authorization as a Verification Engineer
Confirm your CIP code before applying
Your STEM OPT extension depends on your degree's CIP code mapping to the role's SOC code. Check the DHS STEM Designated Degree Program List to verify your major qualifies before you invest time in applications for Verification Engineer positions.
Look up employers on E-Verify directly
Before accepting an offer, search the E-Verify employer search tool to confirm enrollment. An employer not enrolled in E-Verify cannot sign your I-983 training plan, which makes your STEM OPT extension invalid regardless of how the role is structured.
Target companies with active hardware LCA filings
Use the OFLC Wage Search to find employers who have filed Labor Condition Applications for Verification Engineer or related hardware roles. Repeat LCA filers are more likely to have an established process for onboarding F-1 STEM OPT students.
Build an I-983 training plan before your offer deadline
Draft a working I-983 outline covering learning objectives, supervision structure, and how the role relates to your STEM degree. Having a draft ready speeds up the employer signature process and reduces delays between your offer date and your OPT start.
Use Migrate Mate to filter for STEM OPT-ready employers
Search Migrate Mate to find Verification Engineer roles at employers with verified E-Verify enrollment and prior work authorization sponsorship history. Filtering by these criteria up front saves you from pursuing roles where the employer has no infrastructure to support your extension.
Understand cap-gap if your H-1B is pending
If you file for H-1B visa before your STEM OPT expires and receive a timely filed receipt, cap-gap extends your work authorization through September 30. USCIS requires you to remain in a valid employment relationship during this period, so don't let your I-983 lapse.
Frequently Asked Questions
Does my degree qualify me for the STEM OPT extension as a Verification Engineer?
Verification Engineer roles typically fall under SOC codes for electrical and electronics engineers or computer hardware engineers. Your degree in electrical engineering, computer engineering, or computer science is likely on the DHS STEM Designated Degree Program List. Confirm your CIP code against that list before your DSO submits the STEM OPT extension recommendation in SEVIS, since the CIP-to-SOC alignment is what USCIS evaluates.
What does the I-983 training plan need to include for a Verification Engineer role?
Your I-983 must document specific learning objectives tied to verification engineering, such as developing testbenches, writing SystemVerilog assertions, or applying formal verification methods. It must identify a designated supervisor, describe how the role relates to your STEM degree, and confirm the employer is enrolled in E-Verify. Both you and your employer sign it, and your DSO must receive a copy before the extension is approved.
How do I confirm my employer is enrolled in E-Verify before accepting an offer?
Use the E-Verify employer search tool on the E-Verify website to look up the company by name or location. Enrollment is required for STEM OPT employers, and you should verify it before signing an offer letter, not after. If a hiring manager is unfamiliar with E-Verify, that's a signal to ask HR directly whether the company is enrolled and whether they've hired STEM OPT students before.
Can I start a Verification Engineer job before my STEM OPT extension EAD arrives?
No. You can't work after your initial OPT EAD expires, even if your STEM OPT extension application is pending. File the extension no later than 90 days before your current EAD ends to minimize any gap. USCIS does provide a 180-day automatic extension of your OPT work authorization if you file on time and your F-1 status remains valid, but confirm the timeline with your DSO.
Where can I find Verification Engineer jobs where employers are already set up for STEM OPT?
Migrate Mate filters Verification Engineer listings by employers with E-Verify enrollment and prior work authorization sponsorship activity, so you're not starting from scratch on each application. Semiconductor companies, defense contractors, and EDA tool vendors are common hirers for this role, and many have structured programs for onboarding F-1 students already familiar with the I-983 process.