STEM OPT Verification Engineer Jobs
Verification Engineer roles in chip design, FPGA validation, and hardware testing are a strong fit for F-1 students on STEM OPT. Your 24-month extension applies as long as your employer is enrolled in E-Verify and your degree aligns with the SOC code for the role. Electrical engineering, computer engineering, and computer science degrees commonly satisfy that requirement.
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Get Access To All JobsINTRODUCTION
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
ROLE AND RESPONSIBILITIES
As a Physical Verification Engineer, you will be a key technical contributor within the Heterogeneous Integration Group (HIG), responsible for defining, executing, and driving sign-off quality physical verification flows for next-generation HBM logic die and memory-centric SoCs. You will work across physical design, design rule development, EDA tool teams, foundry interfaces, and product engineering teams to deliver industry-leading, tape-out-ready silicon under aggressive schedule, quality, and reliability constraints. This role combines full-chip physical verification ownership — including DRC, LVS, ERC, and DFM — with deep collaboration across implementation and silicon bring-up, ensuring design integrity from layout through first silicon.
Responsibilities will include, but are not limited to:
- Implement physical verification sign-off for full-chip and hierarchical designs, including Design Rule Check (DRC), Layout Versus Schematic (LVS), Electrical Rule Check (ERC), Physical Electrical Rule Check (PERC), antenna checking, and Design for Manufacturability (DFM).
- Implement and debug foundry-qualified rule decks, manage waivers, and drive clean closure while ensuring compliance with advanced-node foundry requirements.
- Perform reliability verification across multiple power domains, including electrostatic discharge (ESD), latch-up, electromigration, floating nets, and connectivity checks.
- Run density, metal fill, and chemical mechanical polishing (CMP) checks to ensure yield-aware manufacturability at 3 nanometer and below.
- Perform parasitic resistance-capacitance (RC) extraction and support correlation of physical verification results with post-silicon measurements.
- Develop, maintain, and optimize physical verification flows, automation, and regression infrastructure using Python, Tcl, Perl, or similar scripting languages.
- Drive adoption of machine learning (ML) and artificial intelligence (AI)-based physical verification and power-performance-area (PPA) optimization tools.
- Partner with physical design, custom layout, computer-aided design (CAD), register-transfer level (RTL), product engineering, EDA, and foundry teams, including direct collaboration with TSMC, from design kick-off through tape-out readiness and sign-off decision gates.
- Demonstrating AI to develop AI assisted development workflows.
MINIMUM QUALIFICATIONS
- Experience with full-chip or block-level physical verification for advanced-node system-on-chip, memory, or heterogeneous integration designs.
- Experience in physical verification methodologies, including DRC, LVS, ERC, PERC, DFM, antenna, and reliability sign-off.
- Experience using industry physical verification tools such as Calibre, IC Validator (ICV), Pegasus, or similar, including rule deck development or customization.
- Working knowledge of full RTL-to-GDS implementation flows, including place-and-route, extraction, and their impact on physical verification outcomes.
- Ability to drive verification closure by maintaining strong communication with multi-functional teams in a global engineering environment.
- Proficiency with demonstrating AI and AI-enabled development workflows.
PREFERRED QUALIFICATIONS
- Experience with high-bandwidth memory (HBM), DRAM, or memory-centric system-on-chip physical verification, including multi-die, chiplet, or 2.5D/3D integration.
- Background in GPU, CPU, or high-performance accelerator physical implementation at advanced process nodes with aggressive sign-off and tape-out schedules.
- Familiarity with foundry develop rule documents, front-end-of-line (FEOL) and back-end-of-line (BEOL) rules, and advanced develop for manufacturability guidelines.
- Exposure to post-silicon failure analysis, yield learning, or layout-based debug with correlation between physical verification results and silicon behavior.
- Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience, with 2 or more years of relevant industry experience.
COMPENSATION
The US base salary range that Micron Technology estimates it could pay for this full-time position is:
- $97,000.00 - $205,000.00 a year
Additional compensation may include benefits, bonuses and equity.
Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
To learn more about Micron, please visit micron.com/careers
US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
Micron Foundation
Strong communities and education are vital to the success of both society and innovative companies. Every Micron site understands the complex needs of their local community. Whether it’s through strategic giving, sponsorships or deploying team member volunteers, we are making a difference.
Sustainability
Micron is committed to sustainable practices and supporting our global community. We are building and maintaining sustainable operations, products, and communities while focusing on opportunities and risks that are most important to our business success and stakeholders.
INTRODUCTION
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
ROLE AND RESPONSIBILITIES
As a Physical Verification Engineer, you will be a key technical contributor within the Heterogeneous Integration Group (HIG), responsible for defining, executing, and driving sign-off quality physical verification flows for next-generation HBM logic die and memory-centric SoCs. You will work across physical design, design rule development, EDA tool teams, foundry interfaces, and product engineering teams to deliver industry-leading, tape-out-ready silicon under aggressive schedule, quality, and reliability constraints. This role combines full-chip physical verification ownership — including DRC, LVS, ERC, and DFM — with deep collaboration across implementation and silicon bring-up, ensuring design integrity from layout through first silicon.
Responsibilities will include, but are not limited to:
- Implement physical verification sign-off for full-chip and hierarchical designs, including Design Rule Check (DRC), Layout Versus Schematic (LVS), Electrical Rule Check (ERC), Physical Electrical Rule Check (PERC), antenna checking, and Design for Manufacturability (DFM).
- Implement and debug foundry-qualified rule decks, manage waivers, and drive clean closure while ensuring compliance with advanced-node foundry requirements.
- Perform reliability verification across multiple power domains, including electrostatic discharge (ESD), latch-up, electromigration, floating nets, and connectivity checks.
- Run density, metal fill, and chemical mechanical polishing (CMP) checks to ensure yield-aware manufacturability at 3 nanometer and below.
- Perform parasitic resistance-capacitance (RC) extraction and support correlation of physical verification results with post-silicon measurements.
- Develop, maintain, and optimize physical verification flows, automation, and regression infrastructure using Python, Tcl, Perl, or similar scripting languages.
- Drive adoption of machine learning (ML) and artificial intelligence (AI)-based physical verification and power-performance-area (PPA) optimization tools.
- Partner with physical design, custom layout, computer-aided design (CAD), register-transfer level (RTL), product engineering, EDA, and foundry teams, including direct collaboration with TSMC, from design kick-off through tape-out readiness and sign-off decision gates.
- Demonstrating AI to develop AI assisted development workflows.
MINIMUM QUALIFICATIONS
- Experience with full-chip or block-level physical verification for advanced-node system-on-chip, memory, or heterogeneous integration designs.
- Experience in physical verification methodologies, including DRC, LVS, ERC, PERC, DFM, antenna, and reliability sign-off.
- Experience using industry physical verification tools such as Calibre, IC Validator (ICV), Pegasus, or similar, including rule deck development or customization.
- Working knowledge of full RTL-to-GDS implementation flows, including place-and-route, extraction, and their impact on physical verification outcomes.
- Ability to drive verification closure by maintaining strong communication with multi-functional teams in a global engineering environment.
- Proficiency with demonstrating AI and AI-enabled development workflows.
PREFERRED QUALIFICATIONS
- Experience with high-bandwidth memory (HBM), DRAM, or memory-centric system-on-chip physical verification, including multi-die, chiplet, or 2.5D/3D integration.
- Background in GPU, CPU, or high-performance accelerator physical implementation at advanced process nodes with aggressive sign-off and tape-out schedules.
- Familiarity with foundry develop rule documents, front-end-of-line (FEOL) and back-end-of-line (BEOL) rules, and advanced develop for manufacturability guidelines.
- Exposure to post-silicon failure analysis, yield learning, or layout-based debug with correlation between physical verification results and silicon behavior.
- Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience, with 2 or more years of relevant industry experience.
COMPENSATION
The US base salary range that Micron Technology estimates it could pay for this full-time position is:
- $97,000.00 - $205,000.00 a year
Additional compensation may include benefits, bonuses and equity.
Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
To learn more about Micron, please visit micron.com/careers
US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
Micron Foundation
Strong communities and education are vital to the success of both society and innovative companies. Every Micron site understands the complex needs of their local community. Whether it’s through strategic giving, sponsorships or deploying team member volunteers, we are making a difference.
Sustainability
Micron is committed to sustainable practices and supporting our global community. We are building and maintaining sustainable operations, products, and communities while focusing on opportunities and risks that are most important to our business success and stakeholders.
See all 81+ STEM OPT Verification Engineer Jobs
Sign up for free to unlock all listings, filter by visa type, and get alerts for new STEM OPT Verification Engineer Jobs.
Get Access To All JobsTips for Finding STEM OPT Authorization as a Verification Engineer
Confirm your CIP code before applying
Your STEM OPT extension depends on your degree's CIP code mapping to the role's SOC code. Check the DHS STEM Designated Degree Program List to verify your major qualifies before you invest time in applications for Verification Engineer positions.
Look up employers on E-Verify directly
Before accepting an offer, search the E-Verify employer search tool to confirm enrollment. An employer not enrolled in E-Verify cannot sign your I-983 training plan, which makes your STEM OPT extension invalid regardless of how the role is structured.
Target companies with active hardware LCA filings
Use the OFLC Wage Search to find employers who have filed Labor Condition Applications for Verification Engineer or related hardware roles. Repeat LCA filers are more likely to have an established process for onboarding F-1 STEM OPT students.
Build an I-983 training plan before your offer deadline
Draft a working I-983 outline covering learning objectives, supervision structure, and how the role relates to your STEM degree. Having a draft ready speeds up the employer signature process and reduces delays between your offer date and your OPT start.
Use Migrate Mate to filter for STEM OPT-ready employers
Search Migrate Mate to find Verification Engineer roles at employers with verified E-Verify enrollment and prior work authorization sponsorship history. Filtering by these criteria up front saves you from pursuing roles where the employer has no infrastructure to support your extension.
Understand cap-gap if your H-1B is pending
If you file for H-1B visa before your STEM OPT expires and receive a timely filed receipt, cap-gap extends your work authorization through September 30. USCIS requires you to remain in a valid employment relationship during this period, so don't let your I-983 lapse.
Frequently Asked Questions
Does my degree qualify me for the STEM OPT extension as a Verification Engineer?
Verification Engineer roles typically fall under SOC codes for electrical and electronics engineers or computer hardware engineers. Your degree in electrical engineering, computer engineering, or computer science is likely on the DHS STEM Designated Degree Program List. Confirm your CIP code against that list before your DSO submits the STEM OPT extension recommendation in SEVIS, since the CIP-to-SOC alignment is what USCIS evaluates.
What does the I-983 training plan need to include for a Verification Engineer role?
Your I-983 must document specific learning objectives tied to verification engineering, such as developing testbenches, writing SystemVerilog assertions, or applying formal verification methods. It must identify a designated supervisor, describe how the role relates to your STEM degree, and confirm the employer is enrolled in E-Verify. Both you and your employer sign it, and your DSO must receive a copy before the extension is approved.
How do I confirm my employer is enrolled in E-Verify before accepting an offer?
Use the E-Verify employer search tool on the E-Verify website to look up the company by name or location. Enrollment is required for STEM OPT employers, and you should verify it before signing an offer letter, not after. If a hiring manager is unfamiliar with E-Verify, that's a signal to ask HR directly whether the company is enrolled and whether they've hired STEM OPT students before.
Can I start a Verification Engineer job before my STEM OPT extension EAD arrives?
No. You can't work after your initial OPT EAD expires, even if your STEM OPT extension application is pending. File the extension no later than 90 days before your current EAD ends to minimize any gap. USCIS does provide a 180-day automatic extension of your OPT work authorization if you file on time and your F-1 status remains valid, but confirm the timeline with your DSO.
Where can I find Verification Engineer jobs where employers are already set up for STEM OPT?
Migrate Mate filters Verification Engineer listings by employers with E-Verify enrollment and prior work authorization sponsorship activity, so you're not starting from scratch on each application. Semiconductor companies, defense contractors, and EDA tool vendors are common hirers for this role, and many have structured programs for onboarding F-1 students already familiar with the I-983 process.