ASIC Design Engineer Jobs in San Jose, CA
ASIC Design Engineer jobs in San Jose are concentrated in Silicon Valley's core semiconductor and fabless chip design corridors, from North San Jose and Alviso to Blossom Valley and the Coyote Creek tech campus clusters. Employers hiring right now include Cisco, ByteDance, and AMD. See the openings below and apply to the ones that match your experience.
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Job Description:
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks.
Responsibilities Include:
Participate in large complex design implementations using the latest technology nodes.
Lead one or more disciplines in design closure as part of the design team.
Have expertise in multiple EDA vendor solutions and be able to quickly adapt to changing requirements.
Participate and drive peer reviews to ensure all quality requirements are met.
Work with customers and design teams across multiple geographies.
Job Complexity/Supervision:
Ability to work on complex technical projects
Exercises judgement in selecting methods, techniques and evaluation criteria for obtaining results
Complete tasks with little supervision, able to lead projects and set direction for other project members.
Experience:
Bachelors and 12+ years of related experience; or Masters degree and 10+ years of related experience; or PhD and 7+ years of related experience
Compensation and Benefits
The annual base salary range for this position is USD 143,800.00 To USD 230,000.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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Find ASIC Design Engineer JobsASIC Design Engineer Job Market in San Jose
Who's Hiring
- Cisco11

- ByteDance4

- AMD2

- Broadcom2

- TSMC1

ASIC Design Engineer Jobs in San Jose: Frequently Asked Questions
How do I get a asic design engineer job in San Jose?
Focus your search on the semiconductor and fabless chip companies concentrated in North San Jose, the Alviso corridor, and the established campus clusters near Brokaw Road and Coyote Creek Parkway. San Jose's ASIC market prizes deep RTL design experience, proficiency with synthesis and place-and-route flows, and familiarity with advanced process nodes. Candidates who have taped out real silicon and can discuss timing closure tradeoffs stand out in a market this specialized.
Which companies hire asic design engineers in San Jose?
Companies currently hiring asic design engineers in San Jose include Cisco, ByteDance, and AMD, per current listings on Migrate Mate as of November 2026. San Jose draws a dense mix of established semiconductor giants, fabless design houses, and data center chip startups, all of which maintain significant ASIC engineering headcount in the city.
Are there remote asic design engineer jobs in San Jose?
Yes, but with limits: ASIC design is inherently lab- and tool-dependent, so fully remote roles are less common than in software. About 50% of asic design engineer openings tied to San Jose are remote or hybrid as of November 2026, reflecting a market where hybrid is the practical compromise. Front-end RTL and verification tasks tend to offer the most flexibility, while physical design and lab bring-up roles typically require on-site presence.
How can I get a asic design engineer job in San Jose with little or no experience?
The most realistic entry path in San Jose is through a design verification or DFT engineer role at a mid-size fabless company or a large semiconductor firm's college hiring program. San Jose employers regularly recruit from local graduate programs and often bring on new engineers as part of structured rotation tracks covering RTL, simulation, and physical design. Building hands-on experience with open-source EDA tools and contributing to a publicly visible chip design project gives entry-level candidates a concrete edge.
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See All 25 ASIC Design Engineer Jobs in San Jose
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