ASIC Design Engineer Jobs in Sunnyvale, CA
ASIC Design Engineer jobs in Sunnyvale, California are in active demand, with employers like Google, Amazon, and Juniper Networks among those hiring. Scan the live roles below and apply to whichever ones fit.
Find ASIC Design Engineer JobsOverview
Showing 5 of 26+ ASIC Design Engineer jobs
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 4 years of experience with design verification.
- Experience with SystemVerilog/Verilog.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- 5 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based individual contributors (ICs) and chips.
- Experience in the full verification life-cycle from test planning to coverage closure.
- Experience with 2 or more SoC projects/cycles.
- Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs.
- Familiarity with ASIC standard interfaces and memory system architecture.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As an ASIC Design Verification Engineer, you will be part of a team developing ASICs used to accelerate computation in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design verification and silicon bring-up. You will participate in the architecture, documentation, and verification of the next generation of data center accelerators.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $138000 - $198000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
- Create a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM).
- Identify and write all types of coverage measures for stimulus and corner-cases.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Close coverage measures to identify verification holes and to show progress towards tape-out.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 4 years of experience with design verification.
- Experience with SystemVerilog/Verilog.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- 5 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based individual contributors (ICs) and chips.
- Experience in the full verification life-cycle from test planning to coverage closure.
- Experience with 2 or more SoC projects/cycles.
- Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs.
- Familiarity with ASIC standard interfaces and memory system architecture.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As an ASIC Design Verification Engineer, you will be part of a team developing ASICs used to accelerate computation in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design verification and silicon bring-up. You will participate in the architecture, documentation, and verification of the next generation of data center accelerators.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $138000 - $198000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
- Create a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM).
- Identify and write all types of coverage measures for stimulus and corner-cases.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Close coverage measures to identify verification holes and to show progress towards tape-out.
See All 26 ASIC Design Engineer Jobs in Sunnyvale
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Find ASIC Design Engineer JobsASIC Design Engineer Job Market in Sunnyvale
Who's Hiring
- Google13
- Amazon3
- Juniper Networks3
- Tensordyne2T
- Hewlett Packard Enterprise | HPE2
Top Industries Hiring
- Technology & Software19
- Artificial Intelligence13
- Retail3
- Manufacturing3
- E-Commerce & Online Marketplaces3
ASIC Design Engineer Jobs in Sunnyvale: Frequently Asked Questions
How many ASIC design engineer jobs are there in Sunnyvale?
There are 26+ ASIC design engineer openings in Sunnyvale, California on Migrate Mate as of June 2026. New positions post regularly as Sunnyvale employers hire.
Which companies hire ASIC design engineers in Sunnyvale?
Sunnyvale ASIC design engineer roles are posted by Google, Amazon, and Juniper Networks and others right now, based on current listings on Migrate Mate as of June 2026.
Are there remote ASIC design engineer jobs in Sunnyvale?
Yes. About 31% of ASIC design engineer openings tied to Sunnyvale are remote or hybrid as of June 2026. The rest are on-site roles based in and around Sunnyvale.
Which industries hire the most ASIC design engineers in Sunnyvale?
Sunnyvale ASIC design engineer roles concentrate in Technology & Software, Artificial Intelligence, and Retail, based on current listings on Migrate Mate as of June 2026.
Related Jobs in California
See All 26 ASIC Design Engineer Jobs in Sunnyvale
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