TN Visa Ic Design Engineer Jobs
IC Design Engineer roles qualify for TN visa sponsorship under the USMCA treaty's Engineer category, which covers integrated circuit design work requiring at least a bachelor's degree in electrical engineering or a related field. Canadian citizens can secure TN status at the port of entry; Mexican citizens apply through a U.S. consulate.
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Get Access To All JobsAbout Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substrates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible.
Key Responsibilities
- IC Substrate Layout Design
- Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.
- Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.
- Ensure robust power delivery designs capable of supporting >700W custom silicon solutions.
- High-Speed Signal Routing & Integrity
- Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk.
- Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout.
- Advanced Packaging & CoWoS Integration
- Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance.
- Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.
- Design Validation & Verification
- Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs.
- Develop and maintain design documentation and guidelines for future substrate designs.
- Support design reviews and provide technical guidance to junior team members.
You may be a good fit if you have
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 10+ years of experience in IC substrate layout design for high-performance processors or accelerators.
- Extensive experience with large substrate packages (>50mm) and complex high-density layouts.
- Proven experience with high-power (700W+) package designs and robust power delivery networks.
- Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches).
- Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWoS.
- Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification).
- Deep understanding of SI/PI principles and how they apply to package-level design.
- Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment.
Benefits
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Housing subsidy of $2k per month for those living within walking distance of the office
- Relocation support for those moving to San Jose (Santana Row)
- Various wellness benefits covering fitness, mental health, and more
- Daily lunch and dinner in our office
- Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substrates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible.
Key Responsibilities
- IC Substrate Layout Design
- Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.
- Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.
- Ensure robust power delivery designs capable of supporting >700W custom silicon solutions.
- High-Speed Signal Routing & Integrity
- Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk.
- Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout.
- Advanced Packaging & CoWoS Integration
- Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance.
- Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.
- Design Validation & Verification
- Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs.
- Develop and maintain design documentation and guidelines for future substrate designs.
- Support design reviews and provide technical guidance to junior team members.
You may be a good fit if you have
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 10+ years of experience in IC substrate layout design for high-performance processors or accelerators.
- Extensive experience with large substrate packages (>50mm) and complex high-density layouts.
- Proven experience with high-power (700W+) package designs and robust power delivery networks.
- Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches).
- Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWoS.
- Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification).
- Deep understanding of SI/PI principles and how they apply to package-level design.
- Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment.
Benefits
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Housing subsidy of $2k per month for those living within walking distance of the office
- Relocation support for those moving to San Jose (Santana Row)
- Various wellness benefits covering fitness, mental health, and more
- Daily lunch and dinner in our office
- Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
See all 42+ TN Visa Ic Design Engineer Jobs
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Get Access To All JobsTips for Finding TN Visa Sponsorship as an Ic Design Engineer
Align your credentials to TN Engineer requirements
Your degree must be in electrical engineering, computer engineering, or a closely related field. A software engineering degree alone can raise questions for IC design roles, so gather transcripts and any credential evaluation letters before approaching employers.
Target employers with dedicated IC design teams
Fabless semiconductor companies, EDA tool vendors, and automotive chip divisions file TN visa petitions regularly. Prioritize job postings that list RTL design, analog layout, or physical verification skills, as these signal in-house roles rather than consulting work that can complicate TN eligibility.
Clarify TN sponsorship before the offer stage
Ask the hiring manager during final interviews whether the company has sponsored TN visas for engineers before. Many mid-size semiconductor firms have done it but don't advertise it, and confirming early prevents surprises during offer negotiation.
Search TN-ready IC design jobs through Migrate Mate
Use Migrate Mate to filter IC Design Engineer openings by employers with TN visa sponsorship history. This saves weeks of cold outreach by surfacing companies already familiar with the USMCA Engineer category filing process.
Confirm your role qualifies before CBP inspection
Canadians presenting at a port of entry need a support letter from the employer describing your IC design duties in engineering terms. CBP officers are not semiconductor specialists, so the letter must explicitly connect your daily responsibilities to the Engineer occupational category.
Prepare for TN duration and renewal from day one
TN status is granted in up to three-year increments with no cap on renewals for Canadians. Have your employer retain project documentation and support letters from the start, so renewal applications at the border don't require rebuilding your file from scratch.
Ic Design Engineer TN Visa: Frequently Asked Questions
Does IC Design Engineer qualify for TN visa status?
Yes. IC Design Engineers qualify under the USMCA Engineer category, which covers roles requiring a bachelor's degree in electrical engineering, computer engineering, or a closely related discipline. The employer's support letter must describe your duties in engineering terms, connecting tasks like RTL coding, analog circuit design, or physical verification to the Engineer occupational category.
How does TN compare to H-1B for IC Design Engineer roles?
TN has no annual lottery, no cap for Canadian citizens, and can be approved at a port of entry the same day for Canadians. H-1B visa selection is lottery-based, capped at 85,000 per fiscal year, and requires USCIS petition processing. For a Canadian IC Design Engineer with a qualifying degree, TN is typically faster and more predictable than waiting on H-1B visa registration results.
Where can I find IC Design Engineer jobs with TN visa sponsorship?
Migrate Mate is built specifically for this search. You can filter IC Design Engineer openings by employers with TN visa sponsorship history, so you're not guessing which companies are willing to file. General job boards rarely surface that information without direct outreach to recruiters.
Can a Mexican IC Design Engineer get TN visa sponsorship?
Yes, but the process differs from Canada. Mexican nationals must apply for a TN visa at a U.S. consulate rather than at a port of entry. The Engineer category is available under USMCA, and the degree and role requirements are identical, but appointment wait times at Mexican consulates add lead time you'll want to plan for before a start date.
What happens to my TN status if I switch IC Design Engineer employers?
TN status is employer-specific, so switching companies requires a new TN authorization. Canadians can go directly to a port of entry with their new employer's support letter and documentation. Mexicans need a new consular appointment. There's no grace period built into TN the way there is with H-1B, so timing the transition carefully with your new employer is essential.