Verification Engineer Jobs in Oregon
Verification Engineer jobs in Oregon concentrate in semiconductor fabrication, advanced electronics manufacturing, and defense systems, with hiring activity centered in Hillsboro, Beaverton, and Portland. Intel, Lattice Semiconductor, and Precision Castparts are among the established Oregon employers with a consistent need for verification engineers across functional verification, ASIC validation, and hardware-software integration. Demand ranges from entry-level verification roles to senior engineers leading formal verification and emulation projects. Find a role that fits below and apply directly.
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Showing 5 of 19+ Verification Engineer jobs
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantages to Microsoft and enable our customers to achieve more.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the CSME team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for experienced engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior Physical Design Verification Engineer to join the team to support our mission and culture. This key role will impact the organization by helping deliver cutting edge silicon.
#SCHIE #CSME
Responsibilities
- Work closely with top level and block level Physical Design Engineers on analysis and fixes on LVS, DRC, ERC, Antenna, etc.
- Drive full chip integration for physical design verification, signoff and Tape-outs on the leading-edge technology nodes.
- Collaborating with clock, analog, integration team on definition, implementation, and verification of critical chip routing, power delivery, block integration and other aspects.
- Work with 3pIP and 1pIP teams for efficient and timely SOC-IP handshake.
- Work with CAD team, tool vendors, foundry and other external partners to develop and validate new tools, flows, runsets, etc.
- Utilize scripting/AI skills to write and customize tool flows to maximize design efficiency and productivity.
Qualifications
Required Qualifications:
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
Other Requirements:
- Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
- This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualifications:
- BS/MS in Electrical or Computer Engineering/Electrical Engineering
- 5+ years of experience in semiconductor chip design/SOC physical design.
- Experience in Physical Verification EDA tools like Mentor Calibre and Synopsys ICV.
- Debugging skills for DRC, LVS, ERC, Antenna, High Voltage DRC, ESD, etc.
- Multiple SOC Tape-Out experience in the advanced foundry process nodes.
- Understanding of full chip integration, floor planning, IO RDL and bump planning.
- Experience and knowledge of physical design flow and industry standard PNR tool (Fusion Compiler/Innovus, ICC2, etc.)
- Understanding of transistor/device basics.
- Proficient in scripting languages such as Perl, TCL, Python.
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process.
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantages to Microsoft and enable our customers to achieve more.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the CSME team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for experienced engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior Physical Design Verification Engineer to join the team to support our mission and culture. This key role will impact the organization by helping deliver cutting edge silicon.
#SCHIE #CSME
Responsibilities
- Work closely with top level and block level Physical Design Engineers on analysis and fixes on LVS, DRC, ERC, Antenna, etc.
- Drive full chip integration for physical design verification, signoff and Tape-outs on the leading-edge technology nodes.
- Collaborating with clock, analog, integration team on definition, implementation, and verification of critical chip routing, power delivery, block integration and other aspects.
- Work with 3pIP and 1pIP teams for efficient and timely SOC-IP handshake.
- Work with CAD team, tool vendors, foundry and other external partners to develop and validate new tools, flows, runsets, etc.
- Utilize scripting/AI skills to write and customize tool flows to maximize design efficiency and productivity.
Qualifications
Required Qualifications:
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
Other Requirements:
- Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
- This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualifications:
- BS/MS in Electrical or Computer Engineering/Electrical Engineering
- 5+ years of experience in semiconductor chip design/SOC physical design.
- Experience in Physical Verification EDA tools like Mentor Calibre and Synopsys ICV.
- Debugging skills for DRC, LVS, ERC, Antenna, High Voltage DRC, ESD, etc.
- Multiple SOC Tape-Out experience in the advanced foundry process nodes.
- Understanding of full chip integration, floor planning, IO RDL and bump planning.
- Experience and knowledge of physical design flow and industry standard PNR tool (Fusion Compiler/Innovus, ICC2, etc.)
- Understanding of transistor/device basics.
- Proficient in scripting languages such as Perl, TCL, Python.
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process.
See All 19 Verification Engineer Jobs in Oregon
Find roles in Oregon that match your experience and apply in just a few clicks.
Find Verification Engineer JobsVerification Engineer Jobs by City in Oregon
Where Oregon roles are concentrated, by current openings.
Verification Engineer Job Market in Oregon
A snapshot from current Oregon openings, updated as new roles post.
Who's Hiring
Top Industries Hiring
- Technology & Software
- Artificial Intelligence
- Electronics & Hardware
What Oregon Employers Look For
The qualifications that appear most often in verification engineer jobs across Oregon.
- Bachelor's degree in electrical engineering, computer engineering, or a related technical field
- Proficiency in hardware verification languages such as SystemVerilog and UVM methodology
- Experience writing and executing directed and constrained-random verification test plans
- Familiarity with simulation tools including Cadence, Synopsys, or Mentor Graphics platforms
- Ability to debug complex RTL designs and trace failures to root cause efficiently
- Strong understanding of digital logic design principles and verification closure metrics
Verification Engineer Jobs in Oregon: Frequently Asked Questions
How do you become a verification engineer in Oregon?
Becoming a verification engineer in Oregon typically starts with a bachelor's degree in electrical engineering, computer engineering, or computer science. Oregon does not require a state-issued license for this role. Most Oregon employers, particularly in the Hillsboro semiconductor corridor, look for candidates with hands-on experience using SystemVerilog and UVM, which you can build through university coursework, capstone projects, or internships with Oregon-based chip design companies.
Which companies hire verification engineers in Oregon?
Companies currently hiring verification engineers in Oregon include Apple, Intel Corporation, and Google, per current listings on Migrate Mate as of November 2026. Oregon's concentration of semiconductor and advanced electronics firms means verification engineering roles appear consistently throughout the year rather than only during seasonal hiring cycles.
Which Oregon cities have the most verification engineer jobs?
Beaverton, Hillsboro, and Portland account for the most verification engineer openings in Oregon. The concentration in the Portland metro area, especially Hillsboro and Beaverton, reflects Intel's large campus operations and the cluster of semiconductor design firms that have built up around them over decades.
Are there remote verification engineer jobs in Oregon?
Yes, but they're less common than in purely software-focused roles, since verification work often requires access to lab equipment, simulation servers, or physical hardware. About 44% of verification engineer openings tied to Oregon are remote or hybrid as of November 2026, and the roles most likely to offer flexibility are those focused on functional simulation and test plan development rather than hands-on emulation or lab validation.
How can I get hired as a verification engineer in Oregon with little or no experience?
The most realistic entry path is an internship or co-op with an Oregon semiconductor company, which Intel and smaller Hillsboro-area design firms offer to engineering students each year. New graduates often move into associate verification engineer or design verification engineer roles where they focus on writing directed tests under senior guidance. Building a portfolio of RTL simulation projects using open-source cores and tools, and earning familiarity with UVM, gives candidates a concrete edge when applying to Oregon's hardware-focused employers.
Where can I find and apply to verification engineer jobs in Oregon?
You can find and apply to verification engineer jobs in Oregon on Migrate Mate, which lists current Oregon openings from employers actively hiring in the state. Find the roles that fit your experience and apply directly from the listings.
See All 19 Verification Engineer Jobs in Oregon
Find roles in Oregon that match your experience and apply in just a few clicks.
Find Verification Engineer Jobs