ASIC Design Engineer Jobs in Austin, TX
ASIC Design Engineer jobs in Austin, Texas are in strong demand, concentrated in the Northwest Austin corridor, the Domain, and the Samsung Austin Semiconductor campus area, across semiconductor, consumer electronics, and defense sectors. Employers hiring right now include Synopsys, Meta, and Positron AI. Find a role that fits below and apply directly.
Find ASIC Design Engineer JobsOverview
Showing 5 of 34+ ASIC Design Engineer jobs
Date posted 11/01/2026
Category Engineering
Hire Type Employee
Job ID 18710
Base Salary Range $180800-$271200
Remote Eligible No
Date Posted 11/01/2026
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are:
An experienced and visionary ASIC Digital Architect, who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in design methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of protocols such as DDR, PCIe/CXL, UCIe, AMBA and its applications. You can define and execute a new architecture for protocols such as UAL (Universal Accelerator Link). You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects.
What You’ll Be Doing:
- Defining and developing ASIC RTL design and verification at both chip and block levels.
- Creating and executing design plans for complex digital designs, particularly focusing on DDR, PCIe, CXL, UAL, UCIe IO protocols.
- Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
- Utilizing advanced design and verification methodologies and tools to achieve high-quality results.
- Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
- Communicating with internal and external stakeholders to align on project goals and deliverables.
The Impact You Will Have:
- Enhancing the reliability and performance of Synopsys’ digital design processes.
- Driving innovations in DDR, PCIe, UAL, UCIe technology, contributing to the development of cutting-edge semiconductor solutions.
- Improving time-to-market for high-performance silicon chips through efficient methodologies.
- Building and nurturing a highly skilled development team, elevating overall project quality.
- Influencing strategic decisions that shape the future of Synopsys’ capabilities.
- Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements.
What You’ll Need:
- BSEE or BSCE +12 years or an advanced degree and +10 years industry experience
- Extensive experience in ASIC RTL design.
- In-depth knowledge of DDR, PCIe, UAL, UCIe and similar IO protocols and their applications.
- Proficiency in advanced digital design tools and methodologies.
- Strong problem-solving skills and the ability to work independently.
- Excellent communication skills for effective collaboration with diverse teams.
Who You Are:
- A visionary leader with a strategic mindset.
- A mentor who fosters talent and encourages innovation.
- A proactive problem solver who thrives in complex environments.
- An effective communicator with the ability to convey technical concepts to a broad audience.
- A team player who values collaboration and diversity.
The Team You’ll Be A Part Of:
You will join a dynamic and innovative team focused on advancing Synopsys' design technologies. Our team is dedicated to excellence, collaboration, and continuous improvement. We work closely with various departments to ensure the successful integration and performance of our solutions. Together, we drive the future of semiconductor technology and make a significant impact on the industry. Specifically, according to a match profile, you will be a key technical contributor to the architecture and execution of one of DDR/PCIe/UAL/UCIe digital core protocols.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can
Date posted 11/01/2026
Category Engineering
Hire Type Employee
Job ID 18710
Base Salary Range $180800-$271200
Remote Eligible No
Date Posted 11/01/2026
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are:
An experienced and visionary ASIC Digital Architect, who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in design methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of protocols such as DDR, PCIe/CXL, UCIe, AMBA and its applications. You can define and execute a new architecture for protocols such as UAL (Universal Accelerator Link). You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects.
What You’ll Be Doing:
- Defining and developing ASIC RTL design and verification at both chip and block levels.
- Creating and executing design plans for complex digital designs, particularly focusing on DDR, PCIe, CXL, UAL, UCIe IO protocols.
- Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
- Utilizing advanced design and verification methodologies and tools to achieve high-quality results.
- Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
- Communicating with internal and external stakeholders to align on project goals and deliverables.
The Impact You Will Have:
- Enhancing the reliability and performance of Synopsys’ digital design processes.
- Driving innovations in DDR, PCIe, UAL, UCIe technology, contributing to the development of cutting-edge semiconductor solutions.
- Improving time-to-market for high-performance silicon chips through efficient methodologies.
- Building and nurturing a highly skilled development team, elevating overall project quality.
- Influencing strategic decisions that shape the future of Synopsys’ capabilities.
- Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements.
What You’ll Need:
- BSEE or BSCE +12 years or an advanced degree and +10 years industry experience
- Extensive experience in ASIC RTL design.
- In-depth knowledge of DDR, PCIe, UAL, UCIe and similar IO protocols and their applications.
- Proficiency in advanced digital design tools and methodologies.
- Strong problem-solving skills and the ability to work independently.
- Excellent communication skills for effective collaboration with diverse teams.
Who You Are:
- A visionary leader with a strategic mindset.
- A mentor who fosters talent and encourages innovation.
- A proactive problem solver who thrives in complex environments.
- An effective communicator with the ability to convey technical concepts to a broad audience.
- A team player who values collaboration and diversity.
The Team You’ll Be A Part Of:
You will join a dynamic and innovative team focused on advancing Synopsys' design technologies. Our team is dedicated to excellence, collaboration, and continuous improvement. We work closely with various departments to ensure the successful integration and performance of our solutions. Together, we drive the future of semiconductor technology and make a significant impact on the industry. Specifically, according to a match profile, you will be a key technical contributor to the architecture and execution of one of DDR/PCIe/UAL/UCIe digital core protocols.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can
See All 34 ASIC Design Engineer Jobs in Austin
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Find ASIC Design Engineer JobsASIC Design Engineer Job Market in Austin
Who's Hiring
Top Industries Hiring
- Electronics & Hardware
- Technology & Software
ASIC Design Engineer Jobs in Austin: Frequently Asked Questions
How do I get a asic design engineer job in Austin?
Austin's semiconductor and chip design market is anchored by large fabs, defense contractors, and fabless design houses concentrated in Northwest Austin and around the Domain. Candidates with RTL design, synthesis, and timing closure experience stand out locally. Familiarity with tools common to Austin's leading semiconductor employers, plus a portfolio of tapeout experience, gives you a meaningful edge over generalist applicants in this market.
Which companies hire asic design engineers in Austin?
Employers hiring asic design engineers in Austin right now include Synopsys, Meta, and Positron AI, based on current listings on Migrate Mate as of November 2026. Austin's mix of semiconductor giants, defense primes, and fabless startups means openings range from volume production-focused roles to cutting-edge custom silicon design positions.
Are there remote asic design engineer jobs in Austin?
Yes, though with significant limitations, since ASIC design engineering involves hands-on lab work, physical prototype validation, and tapeout coordination that typically require on-site presence. About 21% of asic design engineer openings tied to Austin are remote or hybrid as of November 2026, reflecting available flexibility. Front-end RTL coding and verification tasks are the most commonly performed remotely within Austin-based teams.
How can I get a asic design engineer job in Austin with little or no experience?
The most realistic entry path in Austin is targeting verification engineer or design-for-test roles at mid-size semiconductor companies or defense subcontractors, where hiring managers routinely bring on candidates with strong academic projects and internship exposure. Austin's university recruiting pipeline, particularly through UT Austin's ECE programs, feeds directly into local chip design teams. Building tapeout experience through open-source silicon projects or UT-affiliated research strengthens a junior application considerably.
Which industries hire the most asic design engineers in Austin?
Austin asic design engineer roles concentrate in Electronics & Hardware and Technology & Software, based on current listings on Migrate Mate as of November 2026. Austin's position as a major semiconductor manufacturing hub, combined with growing defense electronics and wireless infrastructure investment in the area, sustains consistent local demand across these sectors.
See All 34 ASIC Design Engineer Jobs in Austin
Find roles in Austin that match your experience and apply in just a few clicks.
Find ASIC Design Engineer Jobs