Engineering Jobs in Sunnyvale, CA
Engineering jobs in Sunnyvale are in high demand, concentrated in the Lawrence Expressway corridor, the downtown Sunnyvale transit district, and the Lakeside business area, with openings across semiconductor design, aerospace systems, software infrastructure, and clean energy. Employers hiring right now include Google, Meta, and Apple. Find a role that fits below and apply directly.
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Category Engineering Hire Type Employee Job ID 18829 Base Salary Range $244000-$366000 Remote Eligible No Date Posted 10/25/2026
- Own the PHY architecture, including protocols, data rates, BER, and PPA targets.
- Define data-path and clocking architectures, including modulation, equalization, FEC placement, ADC-DSP, PLL, and CDR.
- Lead calibration and adaptation strategies across process, voltage, temperature, and channel conditions.
- Allocate power, area, performance, and latency across analog, digital, and package components.
- Develop block specifications that engineering teams can implement and verify.
- Close the end-to-end link budget across the transmitter, package, channel, and receiver.
- Define architecture sign-off, modeling, observability, and silicon bring-up requirements, including loopback, PRBS, eye scan, and calibration access.
- Align standards, signal and power integrity, package, and program teams on guaranteed IP performance.
- Define advanced 112 Gb/s and 224 Gb/s PAM4 PHY architectures.
- Improve first-silicon success through rigorous link budgeting, modeling, and observability.
- Reduce integration risk by establishing clear cross-functional specifications and sign-off criteria.
- Enable differentiated, high-performance interface IP for advanced silicon applications.
- Strong architectural knowledge of 112 Gb/s and 224 Gb/s PAM4 serial links.
- Expertise in link budgeting, insertion and return loss, crosstalk, jitter, BER, channel operating margin, and FEC coding gain.
- Deep knowledge of CTLE, FFE, DFE, ADC-DSP, PLL, CDR, adaptation, and calibration.
- Experience with channel and behavioral modeling, process-corner analysis, and analog, digital, and package PPA tradeoffs.
- Silicon bring-up and debug experience using PRBS, loopback, eye scan, and calibration capabilities.
- Demonstrated ability to write clear technical specifications and explain architecture decisions to technical, program, and customer audiences.
- A systems thinker who connects circuit-level decisions to end-to-end link performance.
- A collaborative technical leader who works effectively across disciplines and geographies.
- A clear communicator who translates complex tradeoffs into actionable decisions.
- A pragmatic problem solver focused on quality, performance, and silicon success.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can
Category Engineering Hire Type Employee Job ID 18829 Base Salary Range $244000-$366000 Remote Eligible No Date Posted 10/25/2026
- Own the PHY architecture, including protocols, data rates, BER, and PPA targets.
- Define data-path and clocking architectures, including modulation, equalization, FEC placement, ADC-DSP, PLL, and CDR.
- Lead calibration and adaptation strategies across process, voltage, temperature, and channel conditions.
- Allocate power, area, performance, and latency across analog, digital, and package components.
- Develop block specifications that engineering teams can implement and verify.
- Close the end-to-end link budget across the transmitter, package, channel, and receiver.
- Define architecture sign-off, modeling, observability, and silicon bring-up requirements, including loopback, PRBS, eye scan, and calibration access.
- Align standards, signal and power integrity, package, and program teams on guaranteed IP performance.
- Define advanced 112 Gb/s and 224 Gb/s PAM4 PHY architectures.
- Improve first-silicon success through rigorous link budgeting, modeling, and observability.
- Reduce integration risk by establishing clear cross-functional specifications and sign-off criteria.
- Enable differentiated, high-performance interface IP for advanced silicon applications.
- Strong architectural knowledge of 112 Gb/s and 224 Gb/s PAM4 serial links.
- Expertise in link budgeting, insertion and return loss, crosstalk, jitter, BER, channel operating margin, and FEC coding gain.
- Deep knowledge of CTLE, FFE, DFE, ADC-DSP, PLL, CDR, adaptation, and calibration.
- Experience with channel and behavioral modeling, process-corner analysis, and analog, digital, and package PPA tradeoffs.
- Silicon bring-up and debug experience using PRBS, loopback, eye scan, and calibration capabilities.
- Demonstrated ability to write clear technical specifications and explain architecture decisions to technical, program, and customer audiences.
- A systems thinker who connects circuit-level decisions to end-to-end link performance.
- A collaborative technical leader who works effectively across disciplines and geographies.
- A clear communicator who translates complex tradeoffs into actionable decisions.
- A pragmatic problem solver focused on quality, performance, and silicon success.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can
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Find Engineering JobsEngineering Job Market in Sunnyvale
Who's Hiring
- Google102
- Meta51
- Apple51
- Synopsys51
- Lockheed Martin51
Engineering Jobs in Sunnyvale: Frequently Asked Questions
How do I get a engineering job in Sunnyvale?
Focus your search on Sunnyvale's semiconductor, aerospace, and tech infrastructure sectors, which drive the majority of local engineering hiring. Companies clustered along the Lawrence Expressway corridor and near Moffett Field tend to post the most roles, ranging from hardware and embedded systems to civil and environmental engineering. Candidates with hands-on lab experience, familiarity with defense or chip design workflows, or relevant project portfolios have a clear edge in Sunnyvale's competitive market.
Which companies hire engineerings in Sunnyvale?
Employers hiring engineerings in Sunnyvale right now include Google, Meta, and Apple, based on current listings on Migrate Mate as of November 2026. Sunnyvale's employer mix skews heavily toward established semiconductor firms, defense contractors, and large-scale tech companies with on-site R&D operations.
Are there remote engineering jobs in Sunnyvale?
Yes, though remote availability varies significantly by discipline, with desk-based specialties like software engineering, systems architecture, and data engineering being far more remote-friendly than hands-on roles in hardware, manufacturing, or lab environments. About 0% of engineering openings tied to Sunnyvale are remote or hybrid as of November 2026, reflecting the city's strong software and systems presence. Roles in embedded systems, semiconductor fabrication, and aerospace testing remain predominantly on-site.
How can I get a engineering job in Sunnyvale with little or no experience?
The most realistic entry path in Sunnyvale is through internships or co-op programs at mid-size semiconductor and defense firms, which consistently hire early-career candidates for test engineering, quality assurance, and technical support roles. Companies in the Lakeside and Lawrence Expressway areas often post associate-level openings that serve as direct pipelines to full engineering positions. Building proficiency in CAD tools, circuit simulation software, or systems modeling relevant to Sunnyvale's dominant industries strengthens any entry-level application considerably.
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