H-1B Visa Senior Physical Design Engineer Jobs
Senior Physical Design Engineer roles in the U.S. sit firmly within H-1B visa specialty occupation territory, requiring at least a bachelor's degree in electrical engineering or a related field. Semiconductor and chip design employers file H-1B petitions regularly, but timing your job search around the April 1 filing window and identifying cap-exempt employers can significantly change your path to authorization.
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INTRODUCTION
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
ROLE AND RESPONSIBILITIES
As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands-on role with opportunities to own blocks or top-level integration across multiple product generations.
Key Responsibilities:
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Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets.
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Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs.
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Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY-adjacent logic) with focus on robust physical integration and timing/power integrity.
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Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently.
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Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule.
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Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements.
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Support tape-out execution (checklists, ECO flows, signoff reviews) and contribute to post-silicon debug by correlating silicon behavior with PD/STA/power analysis.
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Identify flow gaps and improve productivity through scripting/automation and best-practice methodology development. (LLM's)
BASIC QUALIFICATIONS
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Strong experience in SoC physical design implementation from netlist to GDSII on advanced nodes and complex designs.
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Proficiency with industry EDA tools (e.g., Cadence Innovus/Tempus, Synopsys ICC2/PrimeTime, Siemens Calibre or equivalent).
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Solid understanding of STA fundamentals, clocking, constraints (SDC), and common closure techniques (buffering, path shaping, useful skew, etc.).
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Experience with power intent and power delivery considerations (e.g., UPF/CPF concepts, power grid planning, power gating implications).
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Familiarity with physical verification/signoff concepts: DRC, LVS, ERC, parasitic extraction awareness, and signoff handoff quality.
PREFERRED QUALIFICATIONS
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Experience with HBM / DRAM adjacent SoC designs, or memory-subsystem-heavy SoCs.
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Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field.
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Minimum 10 years of experience in a related field.
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Proven ability to mentor and develop engineers early in their careers.
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
To learn more about Micron, please visit micron.com/careers
For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
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Insights from previous hires
Years of experience
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- 8+
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- 2 - 4 years
- 4 - 8 years
- 8+ years
Top skills
- Cadence Tools
- Algorithms
- C++
Previously worked at
Previously worked as
- Principal Engineer
- Senior Engineer
- Lead Engineer
- Senior Design Engineer
- Senior Principal Engineer
See all 95+ H-1B Visa Senior Physical Design Engineer Jobs
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Get Access To All JobsTips for Finding H-1B Visa Sponsorship as a Senior Physical Design Engineer
Verify your degree maps to the role
Physical design engineering requires a degree in electrical engineering, computer engineering, or a directly related field. Pull the O*NET occupation profile for your SOC code and confirm your credential matches before any employer files your LCA.
Target cap-exempt employers first
Universities, nonprofit research labs, and government-affiliated research organizations can file H-1B petitions outside the annual lottery. ASIC and chip design roles exist at institutions like national labs, giving you a path that bypasses the 85,000-cap entirely.
Search by verified LCA filing history
Use Migrate Mate to filter Senior Physical Design Engineer roles by employers with confirmed DOL Labor Condition Application filings in your target SOC code, so you're only applying to companies with a documented H-1B sponsorship track record.
Check prevailing wage before negotiating offers
Your employer must pay at least the DOL prevailing wage for your location and job level. Run the OFLC Wage Search for your SOC code and metro area before you receive an offer so you know the floor going into salary discussions.
Ask about I-129 filing timelines during interviews
Your employer controls when they file your H-1B petition, and late filing can cost you a full fiscal year. Ask specifically whether they file on April 1 and whether they use premium processing for physical design engineering hires.
Document EDA tool expertise for specialty occupation RFEs
USCIS increasingly issues Requests for Evidence on physical design roles, questioning whether the position qualifies as a specialty occupation. Keep detailed records of your Cadence, Synopsys, or Mentor toolchain experience and any tape-out credits to support your employer's petition response.
H-1B Visa Senior Physical Design Engineer: Frequently Asked Questions
Does a Senior Physical Design Engineer role qualify as an H-1B specialty occupation?
Yes. Physical design engineering requires at minimum a bachelor's degree in electrical engineering, computer engineering, or a closely related discipline, which meets USCIS's specialty occupation definition. Roles focused on place-and-route, floorplanning, timing closure, or power analysis consistently clear this threshold. Where RFEs arise, they typically challenge job-description vagueness, not the occupation itself, so your employer's LCA and petition language need to specify the technical scope clearly.
Which employers sponsor H-1B visas for physical design engineers?
Semiconductor companies, EDA vendors, fabless chip design firms, and hyperscalers with custom silicon programs are the most consistent H-1B sponsors for this role. Employers working on advanced process nodes at 7nm and below tend to have dedicated immigration support teams and established petition workflows. Browse Migrate Mate to see employers with verified LCA filing history specifically for physical design and related engineering roles.
Can I switch employers mid-H-1B without restarting the process?
Yes, through H-1B portability. If your new employer files an H-1B transfer petition before your current status expires, you can begin working for them as soon as USCIS receives the petition, not after approval. For physical design roles, confirm your new employer's LCA covers your actual job duties and work location, since LCAs are site-specific and a role change to a different fab or design center may require a new LCA.
How does the H-1B lottery affect physical design engineering job searches?
The annual H-1B lottery opens in March and USCIS selects registrations by early April for an October 1 start date. If you're on OPT or CPT, you'll need to time your job search to align with this window or target cap-exempt employers who can file year-round. Some candidates also explore H-1B1 visa or TN visas if eligible, but for most physical design engineers, the lottery is the primary path.
What should I know about prevailing wage for senior-level physical design roles?
Prevailing wage for Senior Physical Design Engineers varies significantly by metro area, with major semiconductor hubs carrying higher DOL wage floors than secondary markets. Your employer must certify on the LCA that your compensation meets or exceeds the prevailing wage for your specific location and experience level. Use the OFLC Wage Search to look up the current wage level for your SOC code and work site before evaluating any offer.