Remote Senior Asic Design Engineer Jobs
Remote Senior Asic Design Engineer jobs are available nationwide at employers like Cornelis Networks, Arcfield, and Tensordyne and other distributed teams, at every experience level. Scan the live roles below and apply to whichever ones fit.
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Title - Lead ASIC DFT Engineer
Location – Remote (must be aligned with PST time zone)
Contract
Experience:
10+ years of hands-on experience in ASIC Design-for-Test (DFT)
Key Responsibilities
- Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
- Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
- Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
- Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
- Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
- Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
- Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
- Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
- Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
- Act as a technical escalation point for advanced DFT and post-silicon debug issues.
- Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
- Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.
Title - Lead ASIC DFT Engineer
Location – Remote (must be aligned with PST time zone)
Contract
Experience:
10+ years of hands-on experience in ASIC Design-for-Test (DFT)
Key Responsibilities
- Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
- Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
- Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
- Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
- Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
- Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
- Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
- Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
- Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
- Act as a technical escalation point for advanced DFT and post-silicon debug issues.
- Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
- Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.
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Find JobsRemote Senior Asic Design Engineer Job Market
Who's Hiring
- Cornelis Networks4
- Arcfield3
- Tensordyne2T
- Cisco1
- Nvidia1
Top Industries Hiring
- Electronics & Hardware5
- Technology & Software2
- Law & Legal Services1
What Employers Look For
The qualifications that appear most often in remote senior asic design engineer jobs.
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
- Proficiency in RTL design using Verilog or SystemVerilog
- Experience with industry-standard EDA tools such as Synopsys or Cadence
- Hands-on experience with full ASIC design flow from specification through tapeout
- Familiarity with timing closure, DFT, and low-power design techniques
- Strong understanding of physical design constraints and semiconductor process nodes
Tips for Your Remote Senior Asic Design Engineer Job Search
Tailor your resume for each design stage
Recruiters scanning senior asic design engineer resumes look for which phases you own: RTL, synthesis, place-and-route, or signoff. List each stage explicitly rather than grouping them under a generic 'design experience' bullet so your depth is immediately clear.
Highlight tapeout experience with specifics
Tapeout credits are a strong differentiator at the senior level. Name the process nodes you've worked on and whether you led or contributed to each tapeout. Employers use this to gauge both technical depth and your ability to deliver under production deadlines.
Apply early to roles that fit
Migrate Mate lists senior asic design engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.
Filter openings by process node requirement
Many senior asic design engineer postings specify a preferred node, such as 7nm, 5nm, or 3nm. Applying to roles that match your node experience avoids early screening cuts and signals you can contribute from day one without a long ramp-up.
Prepare a design walkthrough for interviews
Senior-level ASIC interviews almost always include a deep-dive on a past design. Be ready to walk through architecture choices, timing closure decisions, and tradeoffs you made. Generic process answers without concrete design context rarely pass the technical bar at this level.
Negotiate beyond base salary at offer stage
Total compensation for senior asic design engineers typically includes equity, sign-on bonuses, and tape-out bonuses. Before accepting, ask specifically about each component and vesting schedules so you can compare offers on equivalent terms rather than base alone.
Remote Senior Asic Design Engineer Jobs: Frequently Asked Questions
How do I get a remote senior asic design engineer job?
Target companies that already run distributed teams, since they hire remotely by default and know how to onboard someone they never meet in person. Remote senior asic design engineer employers screen hard for self-direction and clear written communication on top of the core skills, so show evidence you can own work without someone over your shoulder. Apply to the openings above that match your experience.
Which companies hire remote senior asic design engineers?
Remote senior asic design engineer roles are posted by Cornelis Networks, Arcfield, and Tensordyne and others right now, based on current remote listings on Migrate Mate as of June 2026. Remote-first firms and large companies running distributed teams post the most remote senior asic design engineer roles.
Can you get a remote senior asic design engineer job with no experience?
Yes, but it is harder than an on-site role, because remote work expects you to operate independently from the start. Entry-level remote senior asic design engineer openings do exist, especially at remote-first companies, and a portfolio of real work helps more than a long resume. Applying broadly to the roles that fit improves your odds.
Do you need a degree for remote senior asic design engineer jobs?
Not always. Many employers hire remote senior asic design engineers on demonstrated skills and prior work rather than a specific degree, though some larger companies still prefer one. Showing relevant results matters more than a credential for most remote senior asic design engineer roles.
Which industries hire the most remote senior asic design engineers?
Most remote senior asic design engineer openings sit in Electronics & Hardware, Technology & Software, and Law & Legal Services, per current remote listings on Migrate Mate as of June 2026. These sectors run distributed teams and hire senior asic design engineers remotely most consistently.
See All 13 Remote Senior Asic Design Engineer Jobs
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