Senior Asic Design Engineer Jobs in California
Senior Asic Design Engineer jobs in California sit at the center of one of the world's most active semiconductor markets, with demand concentrated in consumer electronics, networking infrastructure, data center silicon, and automotive chips across firms ranging from associate to principal level. The heaviest hiring runs through Silicon Valley, San Diego, and the greater Los Angeles area, with established employers like Qualcomm, Intel, and Apple consistently maintaining large ASIC teams in the state. The most sought-after specialties include high-speed SerDes and PHY design, low-power mobile architectures, and custom AI accelerator blocks. Find a role that fits below and apply directly.
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Showing 5 of 14+ Senior Asic Design Engineer jobs
INTRODUCTION
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
We are looking for a Senior ASIC Design Engineer to join our Circuit Solutions Group! In this position, you'll make a real impact in a dynamic, technology-focused company. Your work will affect product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We've crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the computing platforms of tomorrow. Are you ready to accelerate your career with us?
ROLE AND RESPONSIBILITIES
What You'll Be Doing
- You will be responsible for the micro-architecture and digital design implementation of various innovative IPs for hardware security, clocking, voltage regulation and silicon correlation.
- Collaborate with Architects, Circuit Designers and Verification engineers to deliver a world-class and next-generation solution.
- In this role, you will have the opportunity to develop scalable RTL designs, execute synthesis and perform timing analysis using innovative CAD tools and the latest process technologies in the industry.
- Work on functional verification, perform CDC checks and formal equivalence.
- Support post-si bringup and debug activities.
- Develop and craft tools and flows including Agentic AI flows as necessary in support of design activities.
BASIC QUALIFICATIONS
- BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or a related degree required; advanced degrees (MS, PhD) are a plus.
- 3+ years of relevant proven experience and a background in logic design, Verilog and/or System-Verilog with a deep understanding of physical design and VLSI.
- Experience with multiple clock domains and asynchronous interfaces.
- Exposure to Digital Systems design and computer architecture.
- Programming skills in PERL or Python.
- Excellent communication skills and interpersonal skills are required.
PREFERRED QUALIFICATIONS
- Experience with all stages of ASIC design flow including front end design and verification, DFT, timing analysis, ECO, ATE test development, post-si bringup & debug.
- Good understanding of behavioral real number modeling and low level digital or mixed signal design concepts.
- Strong knowledge or work experience in Mixed signal and custom designed IPs solutions.
- Proficiency in scripting language, such as, Perl, Tcl, Make files and automation methods/algorithms a certain plus.
COMPENSATION
- Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD.
- You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until May 15, 2026. This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
JR2017358
INTRODUCTION
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
We are looking for a Senior ASIC Design Engineer to join our Circuit Solutions Group! In this position, you'll make a real impact in a dynamic, technology-focused company. Your work will affect product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We've crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the computing platforms of tomorrow. Are you ready to accelerate your career with us?
ROLE AND RESPONSIBILITIES
What You'll Be Doing
- You will be responsible for the micro-architecture and digital design implementation of various innovative IPs for hardware security, clocking, voltage regulation and silicon correlation.
- Collaborate with Architects, Circuit Designers and Verification engineers to deliver a world-class and next-generation solution.
- In this role, you will have the opportunity to develop scalable RTL designs, execute synthesis and perform timing analysis using innovative CAD tools and the latest process technologies in the industry.
- Work on functional verification, perform CDC checks and formal equivalence.
- Support post-si bringup and debug activities.
- Develop and craft tools and flows including Agentic AI flows as necessary in support of design activities.
BASIC QUALIFICATIONS
- BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or a related degree required; advanced degrees (MS, PhD) are a plus.
- 3+ years of relevant proven experience and a background in logic design, Verilog and/or System-Verilog with a deep understanding of physical design and VLSI.
- Experience with multiple clock domains and asynchronous interfaces.
- Exposure to Digital Systems design and computer architecture.
- Programming skills in PERL or Python.
- Excellent communication skills and interpersonal skills are required.
PREFERRED QUALIFICATIONS
- Experience with all stages of ASIC design flow including front end design and verification, DFT, timing analysis, ECO, ATE test development, post-si bringup & debug.
- Good understanding of behavioral real number modeling and low level digital or mixed signal design concepts.
- Strong knowledge or work experience in Mixed signal and custom designed IPs solutions.
- Proficiency in scripting language, such as, Perl, Tcl, Make files and automation methods/algorithms a certain plus.
COMPENSATION
- Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD.
- You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until May 15, 2026. This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
JR2017358
See All 14 Senior Asic Design Engineer Jobs in California
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Find JobsSenior Asic Design Engineer Jobs by City in California
Where California roles are concentrated, by current openings.
Senior Asic Design Engineer Job Market in California
A snapshot from current California openings, updated as new roles post.
Who's Hiring
- NVIDIA3
- Ayar Labs2
- Cisco2
- Google2
- Amazon1
Top Industries Hiring
- Technology & Software7
- Electronics & Hardware6
- Artificial Intelligence1
- E-Commerce & Online Marketplaces1
- Retail1
What California Employers Look For
The qualifications that appear most often in senior asic design engineer jobs across California.
- Bachelor's or master's degree in electrical engineering or computer engineering required
- Five or more years of RTL design experience in Verilog or SystemVerilog
- Hands-on physical design knowledge including floorplanning, placement, and timing closure
- Experience taping out a full ASIC from RTL to GDSII in a production environment
- Proficiency with industry EDA tools such as Synopsys Design Compiler or Cadence Genus
- Strong understanding of low-power design techniques including clock gating and power gating
Senior Asic Design Engineer Jobs in California: Frequently Asked Questions
How do you become a senior asic design engineer in California?
The most direct path is a bachelor's or master's degree in electrical engineering or computer engineering followed by several years of RTL design experience at a California semiconductor firm. California does not require a state-issued license for ASIC engineering roles, so advancement depends on demonstrated tape-out experience and deep specialization. Many engineers build toward senior level by progressing through associate and mid-level design roles at companies in Silicon Valley or San Diego's large fabless ecosystem.
How much do senior asic design engineers make in California?
Senior asic design engineers in California earn a median of about $185,180 a year, based on May 2025 Bureau of Labor Statistics wage data, ranging from around $126,590 for the lowest 10% to over $281,210 for the top 10%. Pay rises with experience, specialty, and employer.
Which companies hire senior asic design engineers in California?
Employers hiring senior asic design engineers in California right now include NVIDIA, Ayar Labs, and Cisco, based on current listings on Migrate Mate as of June 2026. California's dense concentration of fabless semiconductor companies and vertically integrated tech firms means hiring is active across a wide range of product areas, from mobile SoCs to data center and automotive chips.
Which California cities have the most senior asic design engineer jobs?
San Jose, Sunnyvale, and Santa Clara have the most senior asic design engineer openings in California. Silicon Valley anchors the bulk of demand through its concentration of fabless chip companies and large tech firms with in-house silicon teams, while San Diego draws heavily from Qualcomm's headquarters and its supplier ecosystem, and Los Angeles reflects growing investment in aerospace and automotive silicon alongside consumer electronics work.
Are there remote senior asic design engineer jobs in California?
Yes, but they're rare. ASIC design involves lab access, EDA tool licenses on secured servers, and close collaboration with physical design and verification teams, which keeps most roles on-site or hybrid. About 7% of senior asic design engineer openings tied to California are remote or hybrid as of June 2026, and the roles most likely to offer flexibility are those focused on RTL coding and microarchitecture definition rather than physical implementation or bring-up.
How can I get hired as a senior asic design engineer in California with little or no experience?
The most realistic entry path is a master's program with a strong digital design thesis followed by an internship or new-grad role at a California fabless company. Firms like Qualcomm, Broadcom, and Marvell run structured new-graduate programs in San Diego and Silicon Valley specifically targeting candidates with academic tape-out or FPGA prototyping experience. Moving from an FPGA design or verification engineering role is a common lateral path, and building a portfolio of RTL projects or contributing to open-source RISC-V cores strengthens a candidate's profile considerably.
Where can I find and apply to senior asic design engineer jobs in California?
You can find and apply to senior asic design engineer jobs in California on Migrate Mate, which lists current California openings from employers actively hiring for this role. Search the available positions, find the roles that fit your experience and location, and apply directly through each listing.
See All 14 Senior Asic Design Engineer Jobs in California
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