Senior Asic Design Engineer Jobs in Texas
Senior Asic Design Engineer jobs in Texas concentrate in semiconductor design, defense electronics, and wireless communications, with demand running from mid-level digital designers through principal architects. Austin, Dallas, and the greater Houston area account for the bulk of openings, anchored by established employers such as Texas Instruments, NXP Semiconductors, and Samsung Semiconductor. The most sought-after specialties are high-speed mixed-signal design, low-power digital ASIC development, and physical design verification. Find a role that fits below and apply directly.
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SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. RTL DESIGN ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
- Evaluate architectural trade-offs based on features, performance requirements and system limitations
- Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design
- Work closely with verification team to ensure all aspects of the design are covered and verified
- Provide timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality check)
- Participate in silicon bring-up and validation
BASIC QUALIFICATIONS:
- Bachelor's degree in electrical engineering, computer engineering, or computer science
- 5+ years of experience in RTL implementation
PREFERRED SKILLS AND EXPERIENCE:
- Ability to solve complex problems including clock domain crossings and power optimization
- ASIC/SoC system integration experience
- Experience with embedded CPU subsystems
- Experience with standard bus protocols (e.g. AXI, AHB, etc.)
- Experience with high speed and low power design techniques
- Scripting skills (e.g. Python, etc.)
- Experience with EDA tools such as HDL simulators and HDL Lint tools
- Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
- Enjoys being challenged and learning new skills
ADDITIONAL REQUIREMENTS:
- Ability to work extended hours or weekends as needed for mission critical deadlines
ITAR REQUIREMENTS:
- To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. RTL DESIGN ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
- Evaluate architectural trade-offs based on features, performance requirements and system limitations
- Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design
- Work closely with verification team to ensure all aspects of the design are covered and verified
- Provide timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality check)
- Participate in silicon bring-up and validation
BASIC QUALIFICATIONS:
- Bachelor's degree in electrical engineering, computer engineering, or computer science
- 5+ years of experience in RTL implementation
PREFERRED SKILLS AND EXPERIENCE:
- Ability to solve complex problems including clock domain crossings and power optimization
- ASIC/SoC system integration experience
- Experience with embedded CPU subsystems
- Experience with standard bus protocols (e.g. AXI, AHB, etc.)
- Experience with high speed and low power design techniques
- Scripting skills (e.g. Python, etc.)
- Experience with EDA tools such as HDL simulators and HDL Lint tools
- Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
- Enjoys being challenged and learning new skills
ADDITIONAL REQUIREMENTS:
- Ability to work extended hours or weekends as needed for mission critical deadlines
ITAR REQUIREMENTS:
- To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.
See All 32 Senior Asic Design Engineer Jobs in Texas
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Find JobsSenior Asic Design Engineer Jobs by City in Texas
Where Texas roles are concentrated, by current openings.
Senior Asic Design Engineer Job Market in Texas
A snapshot from current Texas openings, updated as new roles post.
Who's Hiring
Top Industries Hiring
- Technology & Software
- Electronics & Hardware
- Law & Legal Services
- Artificial Intelligence
What Texas Employers Look For
The qualifications that appear most often in senior asic design engineer jobs across Texas.
- Bachelor's or master's degree in electrical engineering or computer engineering required
- Five or more years of ASIC or custom digital design experience in a production environment
- Proficiency in RTL design using Verilog or SystemVerilog for tape-out projects
- Hands-on experience with synthesis, static timing analysis, and formal verification flows
- Familiarity with TSMC, Samsung, or GlobalFoundries advanced process nodes below 28nm
- Strong collaboration skills for cross-functional work with physical design and validation teams
Senior Asic Design Engineer Jobs in Texas: Frequently Asked Questions
How do you become a senior asic design engineer in Texas?
The standard path is a bachelor's degree in electrical engineering or computer engineering, followed by several years in digital or mixed-signal ASIC roles at a semiconductor or systems company. Texas does not require a state-issued professional license specifically for ASIC design, so advancement is credential-driven: engineers typically build toward senior roles by completing full tape-out cycles, earning certifications in tools like Cadence or Synopsys, and demonstrating ownership of silicon from RTL through verification closure at Texas-based firms.
How much do senior asic design engineers make in Texas?
Senior asic design engineers in Texas earn a median of about $163,860 a year, based on May 2025 Bureau of Labor Statistics wage data, ranging from around $92,940 for the lowest 10% to over $216,260 for the top 10%. Pay rises with experience, specialty, and employer.
Which companies hire senior asic design engineers in Texas?
Employers hiring senior asic design engineers in Texas right now include NVIDIA, Synopsys, and Positron AI, based on current listings on Migrate Mate as of October 2026. Texas's deep semiconductor and defense-electronics base means many of these employers maintain long-term engineering teams rather than project-only headcount, making the market relatively stable for experienced designers.
Which Texas cities have the most senior asic design engineer jobs?
Austin, Central, and Richardson have the most senior asic design engineer openings in Texas. Austin leads because it hosts the headquarters and major design centers of Texas Instruments, Samsung Semiconductor, and a growing cluster of fabless startups, while Dallas draws volume from NXP Semiconductors and defense-adjacent electronics firms, and Houston benefits from the energy-technology and aerospace suppliers that rely on custom silicon.
Are there remote senior asic design engineer jobs in Texas?
Yes, but they're rare. ASIC design involves lab access, EDA tool servers, and close collaboration with physical design and verification teams, which keeps most roles on-site or hybrid. About 35% of senior asic design engineer openings tied to Texas are remote or hybrid as of October 2026, and the positions that do allow off-site work tend to be front-end RTL or verification roles rather than physical design or bring-up work.
How can I get hired as a senior asic design engineer in Texas with little or no experience?
The most realistic entry point is joining a Texas semiconductor company as a digital design engineer or ASIC verification engineer and building toward the senior title through tape-out ownership. Texas Instruments and NXP Semiconductors both run structured new-graduate programs in Austin and Dallas that place engineers directly on product design teams. A strong portfolio of RTL projects or a master's thesis involving synthesizable design gives a significant edge, and adjacent roles in FPGA prototyping or EDA application engineering at Texas-based tool vendors frequently transition into ASIC design careers.
Where can I find and apply to senior asic design engineer jobs in Texas?
You can find and apply to senior asic design engineer jobs in Texas on Migrate Mate, which lists current Texas openings across Austin, Dallas, Houston, and other markets. Find the roles that fit your background and apply directly from the listing.
See All 32 Senior Asic Design Engineer Jobs in Texas
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