Mid Level Senior Test Engineer Jobs
Mid level senior test engineer jobs go to engineers ready to own test strategy end to end, mentor junior colleagues, and make quality decisions without constant oversight. Openings cover on-site, hybrid, and remote settings across Technology & Software, Electronics & Hardware, and Biotechnology & Pharmaceuticals, with employers like Raytheon, Northrop Grumman, and Lockheed Martin hiring at this level now.
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Showing 5 of 161+ Mid Level Senior Test Engineer jobs
Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world's first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.
Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!
If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.
Lightmatter is (re)inventing the future of computing with light!
As a Design for Test Engineer you will work closely with all disciplines involved in chip design and product operations to design, validate, and deploy test solutions for digital, analog, and photonic logic. You will be involved in a variety of tasks including logic design, validation and logic simulations, scripting, timing closure, post-silicon planning and bring up, and bringing products to market.
Responsibilities
- Create new chip, module, and system-level DFT solutions for our highly integrated photonics-based AI platform
- Develop and deploy DFT methodologies for our next generation products
- Provide architecture for integrated electronics/analog/digital test including ATPG and boundary scan
- Work with RTL designers to define front-end integration
- Work with physical-design engineers to provide backend integration
- Create automated flow that can scale with the team and company
- Support initial silicon bring-up through debug
- Validate DFT implementation and requirements
- Proactively solve problems while managing deliverables in a fast-paced, evolving environment.
Minimum Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- At least 5 years of industry experience working on DFT-related activities for advanced ASIC designs
- Proven experience in pre-silicon design activities
- Work independently on daily tasks and projects, while seeking guidance for new and unfamiliar assignments.
- Experience with scripting languages such as Python or TCL
- Solid understanding of DFT concepts such as Scan, ATPG, memory test, and JTAG
- Knowledge of Basic SoC Architecture and HDL languages like Verilog
- Experience working with commercial EDA DFT tools on MBIST, ATPG, and Boundary Scan.
Preferred Qualifications:
- Master degree in Electrical Engineering, Computer Engineering, or related field with 3+ years of industry experience working on ASIC designs with multiple production-quality ASIC tapeouts
- Prior experience working on DFT related tasks in either logic design, validation, implementation or pattern generation and coverage analysis
- Understanding of industry standards and practices in DFT, including JTAG/BSCAN, at-speed Scan-ATPG, MBIST, and trade-offs between test quality and test time
- Ability to conduct experiments during silicon debug, gathering and analyzing data, and utilize scripting to support efficient handling of ATE data
- Understanding of Timing, Physical Design, and Power impact of DFT structures
- Strong teamwork and communication skills with the ability to collaborate with multiple functional teams across a variety of fields
Benefits
- Comprehensive Health Care Plan (Medical, Dental & Vision)
- Retirement Savings Matching Program
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Commuter Benefits
- Flexible, hybrid workplace model
- Equity grants (applicable to full-time employees)
Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.
Export Control
Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.
Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world's first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.
Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!
If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.
Lightmatter is (re)inventing the future of computing with light!
As a Design for Test Engineer you will work closely with all disciplines involved in chip design and product operations to design, validate, and deploy test solutions for digital, analog, and photonic logic. You will be involved in a variety of tasks including logic design, validation and logic simulations, scripting, timing closure, post-silicon planning and bring up, and bringing products to market.
Responsibilities
- Create new chip, module, and system-level DFT solutions for our highly integrated photonics-based AI platform
- Develop and deploy DFT methodologies for our next generation products
- Provide architecture for integrated electronics/analog/digital test including ATPG and boundary scan
- Work with RTL designers to define front-end integration
- Work with physical-design engineers to provide backend integration
- Create automated flow that can scale with the team and company
- Support initial silicon bring-up through debug
- Validate DFT implementation and requirements
- Proactively solve problems while managing deliverables in a fast-paced, evolving environment.
Minimum Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- At least 5 years of industry experience working on DFT-related activities for advanced ASIC designs
- Proven experience in pre-silicon design activities
- Work independently on daily tasks and projects, while seeking guidance for new and unfamiliar assignments.
- Experience with scripting languages such as Python or TCL
- Solid understanding of DFT concepts such as Scan, ATPG, memory test, and JTAG
- Knowledge of Basic SoC Architecture and HDL languages like Verilog
- Experience working with commercial EDA DFT tools on MBIST, ATPG, and Boundary Scan.
Preferred Qualifications:
- Master degree in Electrical Engineering, Computer Engineering, or related field with 3+ years of industry experience working on ASIC designs with multiple production-quality ASIC tapeouts
- Prior experience working on DFT related tasks in either logic design, validation, implementation or pattern generation and coverage analysis
- Understanding of industry standards and practices in DFT, including JTAG/BSCAN, at-speed Scan-ATPG, MBIST, and trade-offs between test quality and test time
- Ability to conduct experiments during silicon debug, gathering and analyzing data, and utilize scripting to support efficient handling of ATE data
- Understanding of Timing, Physical Design, and Power impact of DFT structures
- Strong teamwork and communication skills with the ability to collaborate with multiple functional teams across a variety of fields
Benefits
- Comprehensive Health Care Plan (Medical, Dental & Vision)
- Retirement Savings Matching Program
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Commuter Benefits
- Flexible, hybrid workplace model
- Equity grants (applicable to full-time employees)
Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.
Export Control
Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.
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Find JobsMid Level Senior Test Engineer Job Market
Who's Hiring
- Raytheon14R
- Northrop Grumman11N
- Lockheed Martin4L
- Nokia3
- Rivian3
Top Industries Hiring
- Technology & Software31
- Electronics & Hardware21
- Biotechnology & Pharmaceuticals16
- Aerospace & Defense10
- Manufacturing8
Mid Level Senior Test Engineer Jobs: Frequently Asked Questions
How do I get a mid level senior test engineer job?
Position yourself around ownership, not just execution. Highlight projects where you defined the test approach, caught critical defects before release, or improved coverage on a complex feature. Tailor your resume to show impact, such as reduced defect escape rates or faster release cycles. Mid level roles go to engineers who can demonstrate they drive quality outcomes, not just follow a test plan someone else wrote.
Which companies hire mid level senior test engineers?
Companies hiring mid level senior test engineers right now include Raytheon, Northrop Grumman, and Lockheed Martin, based on current listings on Migrate Mate as of August 2026. Hiring at this level covers large technology firms, financial services companies, and growth-stage software product companies that need engineers who can own quality across a full product area.
Are there remote mid level senior test engineer jobs?
Yes, remote and hybrid options are widely available at this level. About 21% of mid level senior test engineer openings are remote or hybrid as of August 2026, reflecting how broadly testing work has shifted to distributed teams. Searching by work setting on Migrate Mate lets you filter to remote-only or hybrid openings quickly.
How do I move up to a mid level senior test engineer role?
The path from entry level to mid level is built on deepening ownership over time. Start by mastering one area of the test stack, then take on full responsibility for a feature or release cycle. Build skills in test automation, CI/CD integration, and defect analysis. Consistently delivering measurable quality improvements and showing you can guide less experienced teammates signals readiness for a mid level role.
Which industries hire the most mid level senior test engineers?
Mid Level senior test engineer roles concentrate in Technology & Software, Electronics & Hardware, and Biotechnology & Pharmaceuticals, based on current listings on Migrate Mate as of August 2026. These sectors drive consistent hiring at this level because their products require rigorous, ongoing quality assurance across complex, rapidly evolving codebases and release cycles.