Senior ML Engineer Jobs at Google with Visa Sponsorship
Senior ML Engineer jobs at Google sit at the intersection of large-scale infrastructure and applied research, covering production model deployment, ML platform engineering, and deep learning systems. Google has a consistent track record of sponsoring work visas for this function, supporting candidates through H-1B visa, H-1B1 visa, and E-3 visa pathways.
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Note: By applying to this position you will have an opportunity to share your preferred working location from the following: San Diego, CA, USA; Mountain View, CA, USA.
MINIMUM QUALIFICATIONS
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 10 years of experience with verifying digital logic at RTL using SystemVerilog for ASICs.
- Experience leading a team completing the full functional verification and performance validation cycle of subsystems such as Camera ML/Multimedia/ISP, Display, TPU/GPU, processors, or at the SOC level.
- Experience constructing reusable verification components and environments using UVM.
- Experience with object oriented programming.
PREFERRED QUALIFICATIONS
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with Camera ISP image processing or other Multimedia IPs such as Display or Video Codec or ML Accelerator verification.
- Experience with System Verilog Assertions (SVA), assertion-based verification, and formal verification.
- Experience working with software teams to define hardware/software interfacing including control/status registers, security, and error handling.
- Experience working with RTL design and integration teams on methodologies that improve team productivity and velocity.
- Experience with Low Power Verification and power management flows.
ABOUT THE JOB
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will lead and manage a global team of Verification Engineers and independently own Verification closure of various Machine Learning (ML) Accelerators and Multimedia IP designs. This includes verification methodology, infrastructure, test-benches, planning, metrics development and convergence of metrics to deliver high quality ISP Designs. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + equity + benefits.
Responsibilities
Learn more about benefits at Google.
- Plan the verification of complex ML and multimedia hardware at IP and Subsystem level and while supporting full chip level integration by fully understanding the design specification and interacting with architecture and design engineers to identify important verification scenarios.
- Create and enhance constrained-random verification environments using System Verilog and UVM.
- Identify and write all types of coverage measures for stimulus and corner-cases, work with design engineers to debug tests to deliver functionally correct design blocks.
- Manage and mentor a global team of design verification engineers, including methodology department, in all aspects of design verification including test plan reviews, coverage analysis, regression/simulation and debug, and schedule planning for quality verification milestones.
- Manage the interface between SoC Design Verification teams and the ML/Multimedia Hardware Design Verification team including required deliverables for all SoC verification milestones.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
INTRODUCTION
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: San Diego, CA, USA; Mountain View, CA, USA.
MINIMUM QUALIFICATIONS
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 10 years of experience with verifying digital logic at RTL using SystemVerilog for ASICs.
- Experience leading a team completing the full functional verification and performance validation cycle of subsystems such as Camera ML/Multimedia/ISP, Display, TPU/GPU, processors, or at the SOC level.
- Experience constructing reusable verification components and environments using UVM.
- Experience with object oriented programming.
PREFERRED QUALIFICATIONS
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with Camera ISP image processing or other Multimedia IPs such as Display or Video Codec or ML Accelerator verification.
- Experience with System Verilog Assertions (SVA), assertion-based verification, and formal verification.
- Experience working with software teams to define hardware/software interfacing including control/status registers, security, and error handling.
- Experience working with RTL design and integration teams on methodologies that improve team productivity and velocity.
- Experience with Low Power Verification and power management flows.
ABOUT THE JOB
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will lead and manage a global team of Verification Engineers and independently own Verification closure of various Machine Learning (ML) Accelerators and Multimedia IP designs. This includes verification methodology, infrastructure, test-benches, planning, metrics development and convergence of metrics to deliver high quality ISP Designs. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + equity + benefits.
Responsibilities
Learn more about benefits at Google.
- Plan the verification of complex ML and multimedia hardware at IP and Subsystem level and while supporting full chip level integration by fully understanding the design specification and interacting with architecture and design engineers to identify important verification scenarios.
- Create and enhance constrained-random verification environments using System Verilog and UVM.
- Identify and write all types of coverage measures for stimulus and corner-cases, work with design engineers to debug tests to deliver functionally correct design blocks.
- Manage and mentor a global team of design verification engineers, including methodology department, in all aspects of design verification including test plan reviews, coverage analysis, regression/simulation and debug, and schedule planning for quality verification milestones.
- Manage the interface between SoC Design Verification teams and the ML/Multimedia Hardware Design Verification team including required deliverables for all SoC verification milestones.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
See all Senior ML Engineer Jobs at Google
Sign up for free to unlock all listings, filter by visa type, and get alerts for new Senior ML Engineer Jobs at Google.
Get Access To All JobsTips for Finding Senior ML Engineer Jobs at Google
Tailor your resume to Google's ML stack
Google's Senior ML Engineer interviews heavily test systems design at scale. Frame your experience around distributed training, model serving infrastructure, or ML pipeline tooling rather than generic data science projects. Reviewers are looking for production credibility, not research summaries.
Distinguish yourself in the system design round
Google's technical loop for ML roles includes a dedicated ML systems design interview. Prepare to architect feature stores, training pipelines, and inference systems under latency and throughput constraints. This round often determines leveling, which directly shapes your visa petition's wage tier.
Clarify sponsorship eligibility before your recruiter screen
Australian citizens should ask recruiters about E-3 availability early. E-3 petitions aren't subject to the H-1B lottery, so if you qualify, your start date can be weeks away rather than tied to an October 1 cap date.
Understand how Google's offer timeline affects H-1B filing
If you're targeting an H-1B, Google typically files in April for an October 1 start. USCIS requires a petitioner-employer relationship before submission, so your offer must be in place before the registration window opens in mid-March.
Search verified sponsorship data before applying
Use Migrate Mate to filter Senior ML Engineer openings at Google by visa type. This helps you confirm active sponsorship for your specific category and focus your applications on roles aligned with your current status.
Request premium processing if your status is time-sensitive
If you're in a 60-day grace period or approaching an OPT expiration, ask Google's immigration team whether they'll file with USCIS premium processing. Adjudication under that track runs within 15 business days, which can be critical for bridging status gaps.
Frequently Asked Questions
Does Google sponsor H-1B visas for Senior ML Engineers?
Yes, Google sponsors H-1B visas for Senior ML Engineers. The process follows the standard USCIS cap-subject lottery, with registration in mid-March and an October 1 start date if selected. Google has dedicated immigration counsel and coordinates the petition process internally, so you won't need to manage USCIS filings independently once you have an offer.
Which visa types does Google commonly use for Senior ML Engineer roles?
Google sponsors H-1B visas for the broadest pool of international candidates, H-1B1 visas for Chilean and Singaporean nationals, and E-3 visas for Australian citizens. Each carries different timelines and lottery exposure. H-1B1 and E-3 are not subject to the annual cap, which makes them significantly faster options if you qualify by nationality.
What qualifications does Google expect for Senior ML Engineer roles?
Google's Senior ML Engineer bar typically requires a bachelor's degree or higher in computer science, machine learning, or a related engineering field, plus demonstrated experience building and deploying ML systems at scale. Practical depth in areas like model optimization, distributed training, or ML infrastructure carries more weight than academic credentials alone. Prior experience with large-scale production environments is a strong differentiator.
How do I apply for Senior ML Engineer jobs at Google?
You can browse open Senior ML Engineer roles at Google through Migrate Mate, which filters listings by visa sponsorship type so you can confirm your visa category is supported before applying. Once you identify a role, applications go through Google's careers portal. Recruiters typically conduct an initial screen within two to three weeks, followed by a structured technical loop.
How do I plan my timeline around Google's visa sponsorship process?
Timeline planning depends on which visa you need. For H-1B, count backward from October 1 and ensure your offer is in place before the March registration window. For E-3 or H-1B1 visa, consular appointments at a U.S. embassy are often bookable within a few weeks. If you're on OPT, confirm whether your start date requires cap-gap protection or a STEM OPT extension before accepting an offer.