Physical Design Engineer Jobs in California
Physical Design Engineer jobs in California are concentrated in Silicon Valley, San Diego, and the Los Angeles metro, where companies like Qualcomm, Apple, and Intel maintain large semiconductor design teams working across floor planning, place-and-route, and timing closure. Demand is strongest for engineers with deep experience in advanced process nodes, low-power design techniques, and signoff flows used in mobile, AI accelerator, and automotive chip programs. Openings range from associate-level roles for recent graduates to principal and staff-level positions leading complex multi-die designs. Find a role that fits below and apply directly.
Find Physical Design Engineer JobsOverview
Showing 5 of 84+ Physical Design Engineer jobs
Company:
Qualcomm Technologies, Inc.Job Area:
Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:
This individual independently plans, performs the moderately-defined responsibility for the Physical Design Flow of high-speed DDR, graphics, physical verification flows, microarchitecture, SOC algorithm design and modeling, and methodology, focusing on target power utilization and optimization for system-on-chip (SoC) products and how these features impact power and performance. Responsibilities include: Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis and closure. Performs various physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield) at the chip and block levels. Provides schedules and support cross-functional engineering effort to drive to signoff closure for tapeout. Acts as a strong contributor at design reviews and project meetings.
Will accept a Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field.
Pay Range: $146,717.00 - $190,100.00/year
Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
If you would like more information about this role, please contact Qualcomm Careers .
Company:
Qualcomm Technologies, Inc.Job Area:
Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:
This individual independently plans, performs the moderately-defined responsibility for the Physical Design Flow of high-speed DDR, graphics, physical verification flows, microarchitecture, SOC algorithm design and modeling, and methodology, focusing on target power utilization and optimization for system-on-chip (SoC) products and how these features impact power and performance. Responsibilities include: Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis and closure. Performs various physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield) at the chip and block levels. Provides schedules and support cross-functional engineering effort to drive to signoff closure for tapeout. Acts as a strong contributor at design reviews and project meetings.
Will accept a Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field.
Pay Range: $146,717.00 - $190,100.00/year
Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
If you would like more information about this role, please contact Qualcomm Careers .
See All 84 Physical Design Engineer Jobs in California
Find roles in California that match your experience and apply in just a few clicks.
Find Physical Design Engineer JobsPhysical Design Engineer Jobs by City in California
Where California roles are concentrated, by current openings.
Physical Design Engineer Job Market in California
A snapshot from current California openings, updated as new roles post.
Who's Hiring
- Apple13
- Qualcomm9
- Astera Labs7
- Etched4
- Google4
Top Industries Hiring
- Electronics & Hardware26
- Technology & Software13
- Consulting & Professional Services5
- Telecommunications4
- Aerospace & Defense2
What California Employers Look For
The qualifications that appear most often in physical design engineer jobs across California.
- Bachelor's or master's degree in electrical engineering or a related field required
- Proficiency in industry-standard EDA tools such as Cadence Innovus or Synopsys IC Compiler
- Hands-on experience with place-and-route, floorplanning, and static timing analysis
- Familiarity with advanced CMOS process nodes at 7nm, 5nm, or below
- Understanding of low-power design methodologies including clock gating and power domains
- Strong collaboration skills for working with front-end design, verification, and physical verification teams
Physical Design Engineer Jobs in California: Frequently Asked Questions
How do you become a physical design engineer in California?
Most physical design engineers in California enter the field with a bachelor's degree in electrical engineering, computer engineering, or a closely related discipline, and many competitive roles at advanced-node companies prefer a master's degree. No state-issued license is required for the role. Candidates build practical readiness through coursework in VLSI design and digital circuits, internships at California semiconductor companies, and demonstrated tool proficiency in EDA environments used across the state's chip design industry.
Which companies hire physical design engineers in California?
Employers hiring physical design engineers in California right now include Apple, Qualcomm, and Astera Labs, based on current listings on Migrate Mate as of August 2026. California's dense concentration of fabless semiconductor firms, systems companies with in-house chip teams, and design service providers makes it one of the most active hiring markets in the country for this role.
Which California cities have the most physical design engineer jobs?
San Jose, Santa Clara, and Sunnyvale account for the largest share of physical design engineer openings in California. Silicon Valley drives the bulk of demand through its concentration of fabless semiconductor companies and large systems firms with custom silicon programs, while San Diego's strength in mobile and wireless chip design sustains consistent hiring, and Los Angeles-area openings reflect growing aerospace and automotive semiconductor programs anchored by major system integrators.
Are there remote physical design engineer jobs in California?
Yes, but they're uncommon. Physical design engineering is a collaboration-intensive discipline that typically requires access to licensed EDA tool servers, secure design environments, and close coordination with layout, verification, and process teams, making fully remote arrangements less common than in purely software-focused fields. About 21% of physical design engineer openings tied to California are remote or hybrid as of August 2026. Hybrid arrangements are most often available for experienced engineers handling timing analysis or signoff tasks rather than hands-on floorplanning work.
How can I get hired as a physical design engineer in California with little or no experience?
The most realistic entry path is through a new-graduate or early-career program at a California semiconductor company, where structured rotations introduce candidates to place-and-route flows and physical verification under experienced mentors. Large California employers in Silicon Valley and San Diego regularly hire new graduates with strong VLSI coursework and EDA tool familiarity gained through university lab work or senior design projects. Candidates who can demonstrate hands-on exposure to Cadence or Synopsys tools, even in an academic setting, and who hold a master's degree in electrical engineering stand out in a competitive applicant pool.
Where can I find and apply to physical design engineer jobs in California?
You can find and apply to physical design engineer jobs in California on Migrate Mate, which lists current openings from employers actively hiring in the state. Search the available roles, identify the ones that match your experience and target location, and apply directly to the ones that fit.
See All 84 Physical Design Engineer Jobs in California
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